"abc7d0f75c078524f713cb2d4b4efe1b1a122c60" (history) in projects: rk3399_rockchip-uboot

Searched hist:abc7d0f75c078524f713cb2d4b4efe1b1a122c60 (Results 1 – 3 of 3) sorted by relevance

/rk3399_rockchip-uboot/board/freescale/ls2080ardb/
H A D	ls2080ardb.c	`abc7d0f75c078524f713cb2d4b4efe1b1a122c60 Thu Jan 28 07:38:15 UTC 2016 Shaohui Xie <Shaohui.Xie@nxp.com> armv8: ls2080ardb: invert irq pins polarity for AQR405 PHY To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins polarity by setting IRQCR register, because AQR405 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>`
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-fsl-layerscape/
H A D	immap_lsch3.h	`abc7d0f75c078524f713cb2d4b4efe1b1a122c60 Thu Jan 28 07:38:15 UTC 2016 Shaohui Xie <Shaohui.Xie@nxp.com> armv8: ls2080ardb: invert irq pins polarity for AQR405 PHY To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins polarity by setting IRQCR register, because AQR405 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>`
/rk3399_rockchip-uboot/include/configs/
H A D	ls2080ardb.h	`abc7d0f75c078524f713cb2d4b4efe1b1a122c60 Thu Jan 28 07:38:15 UTC 2016 Shaohui Xie <Shaohui.Xie@nxp.com> armv8: ls2080ardb: invert irq pins polarity for AQR405 PHY To use AQR405 PHY's interrupt, we need to invert the relative IRQ pins polarity by setting IRQCR register, because AQR405 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>`