Searched hist:a4ddd24f97953b6c8ad6b9dfddc240067807c502 (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/xilinx/versal_net/ |
| H A D | plat_psci_pm.c | a4ddd24f97953b6c8ad6b9dfddc240067807c502 Mon Oct 14 04:19:45 UTC 2024 Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> fix(versal-net): explicitly check operators precedence
This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.
Change-Id: I3c30f5029628f8b297c08443a2c6c8bbf2063d29
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| H A D | bl31_versal_net_setup.c | a4ddd24f97953b6c8ad6b9dfddc240067807c502 Mon Oct 14 04:19:45 UTC 2024 Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> fix(versal-net): explicitly check operators precedence
This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.
Change-Id: I3c30f5029628f8b297c08443a2c6c8bbf2063d29
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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