Searched hist:a117f09b28bbbb3e4accdf6d5b68ebc683e8934e (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | ich.h | a117f09b28bbbb3e4accdf6d5b68ebc683e8934e Thu Oct 19 01:20:57 UTC 2017 Bin Meng <bmeng.cn@gmail.com> UPSTREAM: spi: ich: Lock down controller settings if required
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.
Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.
Change-Id: I2cef052b87320392449c39a8aa2330236539a2c3
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit ab20107468de5bf6b9affa93b17f2284cc838b5b)
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| H A D | ich.c | a117f09b28bbbb3e4accdf6d5b68ebc683e8934e Thu Oct 19 01:20:57 UTC 2017 Bin Meng <bmeng.cn@gmail.com> UPSTREAM: spi: ich: Lock down controller settings if required
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.
Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.
Change-Id: I2cef052b87320392449c39a8aa2330236539a2c3
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit ab20107468de5bf6b9affa93b17f2284cc838b5b)
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