Searched hist:"9 a9645105b7aece52f4fdefc7fdeec7d73ceaed5" (Results 1 – 5 of 5) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/include/drivers/ |
| H A D | memctrl.h | 9a9645105b7aece52f4fdefc7fdeec7d73ceaed5 Wed Jun 10 08:34:32 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Reserve a Video Memory aperture in DRAM memory
This patch adds support to reserve a memory carveout region in the
DRAM on Tegra SoCs. The memory controller provides specific registers
to specify the aperture's base and size. This aperture can also be
changed dynamically in order to re-size the memory available for
DRM video playback. In case of the new aperture not overlapping
the previous one, the previous aperture has to be cleared before
setting up the new one. This means we do not "leak" any video data
to the NS world.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/common/ |
| H A D | tegra_sip_calls.c | 9a9645105b7aece52f4fdefc7fdeec7d73ceaed5 Wed Jun 10 08:34:32 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Reserve a Video Memory aperture in DRAM memory
This patch adds support to reserve a memory carveout region in the
DRAM on Tegra SoCs. The memory controller provides specific registers
to specify the aperture's base and size. This aperture can also be
changed dynamically in order to re-size the memory available for
DRM video playback. In case of the new aperture not overlapping
the previous one, the previous aperture has to be cleared before
setting up the new one. This means we do not "leak" any video data
to the NS world.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| H A D | tegra_common.mk | 9a9645105b7aece52f4fdefc7fdeec7d73ceaed5 Wed Jun 10 08:34:32 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Reserve a Video Memory aperture in DRAM memory
This patch adds support to reserve a memory carveout region in the
DRAM on Tegra SoCs. The memory controller provides specific registers
to specify the aperture's base and size. This aperture can also be
changed dynamically in order to re-size the memory available for
DRM video playback. In case of the new aperture not overlapping
the previous one, the previous aperture has to be cleared before
setting up the new one. This means we do not "leak" any video data
to the NS world.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| H A D | tegra_bl31_setup.c | 9a9645105b7aece52f4fdefc7fdeec7d73ceaed5 Wed Jun 10 08:34:32 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Reserve a Video Memory aperture in DRAM memory
This patch adds support to reserve a memory carveout region in the
DRAM on Tegra SoCs. The memory controller provides specific registers
to specify the aperture's base and size. This aperture can also be
changed dynamically in order to re-size the memory available for
DRM video playback. In case of the new aperture not overlapping
the previous one, the previous aperture has to be cleared before
setting up the new one. This means we do not "leak" any video data
to the NS world.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/include/ |
| H A D | tegra_private.h | 9a9645105b7aece52f4fdefc7fdeec7d73ceaed5 Wed Jun 10 08:34:32 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Reserve a Video Memory aperture in DRAM memory
This patch adds support to reserve a memory carveout region in the
DRAM on Tegra SoCs. The memory controller provides specific registers
to specify the aperture's base and size. This aperture can also be
changed dynamically in order to re-size the memory available for
DRM video playback. In case of the new aperture not overlapping
the previous one, the previous aperture has to be cleared before
setting up the new one. This means we do not "leak" any video data
to the NS world.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|