108438e24SVarun Wadekar /* 20c2276e3SVarun Wadekar * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3*66e0b947SVarun Wadekar * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. 408438e24SVarun Wadekar * 582cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 608438e24SVarun Wadekar */ 708438e24SVarun Wadekar 8c3cf06f1SAntonio Nino Diaz #ifndef MEMCTRL_H 9c3cf06f1SAntonio Nino Diaz #define MEMCTRL_H 1008438e24SVarun Wadekar 1108438e24SVarun Wadekar void tegra_memctrl_setup(void); 12102e4087SVarun Wadekar void tegra_memctrl_restore_settings(void); 1308438e24SVarun Wadekar void tegra_memctrl_tzdram_setup(uint64_t phys_base, uint32_t size_in_bytes); 149a964510SVarun Wadekar void tegra_memctrl_videomem_setup(uint64_t phys_base, uint32_t size_in_bytes); 150c2276e3SVarun Wadekar void tegra_memctrl_disable_ahb_redirection(void); 16650d9c52SHarvey Hsieh void tegra_memctrl_clear_pending_interrupts(void); 1708438e24SVarun Wadekar 18c3cf06f1SAntonio Nino Diaz #endif /* MEMCTRL_H */ 19