Searched hist:"8 ce40503ad00fe0dd35de6e51551da2b4f08a848" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | neoverse_n1.S | 8ce40503ad00fe0dd35de6e51551da2b4f08a848 Wed Nov 02 21:12:01 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Neoverse N1 erratum 2743102
Neoverse N1 erratum 2743102 is a Cat B erratum that applies to
all revisions <=r4p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN885747/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I81a8793c1a118764df3ac97b67f5e088f56f6a20
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| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 8ce40503ad00fe0dd35de6e51551da2b4f08a848 Wed Nov 02 21:12:01 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Neoverse N1 erratum 2743102
Neoverse N1 erratum 2743102 is a Cat B erratum that applies to
all revisions <=r4p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN885747/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I81a8793c1a118764df3ac97b67f5e088f56f6a20
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 8ce40503ad00fe0dd35de6e51551da2b4f08a848 Wed Nov 02 21:12:01 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Neoverse N1 erratum 2743102
Neoverse N1 erratum 2743102 is a Cat B erratum that applies to
all revisions <=r4p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN885747/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I81a8793c1a118764df3ac97b67f5e088f56f6a20
|