Searched hist:"889 c07c7b1a9739bcc907ad1f988fa484d22f84c" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/include/t186/ |
| H A D | tegra186_private.h | 889c07c7b1a9739bcc907ad1f988fa484d22f84c Wed Nov 08 22:45:08 UTC 2017 Varun Wadekar <vwadekar@nvidia.com> Tegra186: helper functions for CPU rst handler and SMMU ctx offset
This patch adds a helper function to get the SMMU context's offset
and uses another helper function to get the CPU trampoline offset.
These helper functions are used by the System Suspend entry sequence
to save the SMMU context and CPU reset handler to TZDRAM.
Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/ |
| H A D | plat_trampoline.S | 889c07c7b1a9739bcc907ad1f988fa484d22f84c Wed Nov 08 22:45:08 UTC 2017 Varun Wadekar <vwadekar@nvidia.com> Tegra186: helper functions for CPU rst handler and SMMU ctx offset
This patch adds a helper function to get the SMMU context's offset
and uses another helper function to get the CPU trampoline offset.
These helper functions are used by the System Suspend entry sequence
to save the SMMU context and CPU reset handler to TZDRAM.
Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| H A D | plat_psci_handlers.c | 889c07c7b1a9739bcc907ad1f988fa484d22f84c Wed Nov 08 22:45:08 UTC 2017 Varun Wadekar <vwadekar@nvidia.com> Tegra186: helper functions for CPU rst handler and SMMU ctx offset
This patch adds a helper function to get the SMMU context's offset
and uses another helper function to get the CPU trampoline offset.
These helper functions are used by the System Suspend entry sequence
to save the SMMU context and CPU reset handler to TZDRAM.
Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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