Searched hist:"8668 fe0c80bf579d697f1e71c62cd8e8d5e7231d" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/drivers/se/ |
| H A D | se_private.h | 8668fe0c80bf579d697f1e71c62cd8e8d5e7231d Mon May 15 18:10:37 UTC 2017 Sam Payne <spayne@nvidia.com> Tegra210B01: initialize DRBG on boot and resume
DRBG must be initialized to guarantee SRK has a random value during suspend. This patch add a sequence to generate an SRK on boot and during resume for SE1 and SE2. This SRK value is not saved to PMC scratch, and should be overwitten during atomic suspend.
Change-Id: Id5e2dc74a1b462dd6addaec1709fec46083a6e1c Signed-off-by: Sam Payne <spayne@nvidia.com>
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| H A D | security_engine.c | 8668fe0c80bf579d697f1e71c62cd8e8d5e7231d Mon May 15 18:10:37 UTC 2017 Sam Payne <spayne@nvidia.com> Tegra210B01: initialize DRBG on boot and resume
DRBG must be initialized to guarantee SRK has a random value during suspend. This patch add a sequence to generate an SRK on boot and during resume for SE1 and SE2. This SRK value is not saved to PMC scratch, and should be overwitten during atomic suspend.
Change-Id: Id5e2dc74a1b462dd6addaec1709fec46083a6e1c Signed-off-by: Sam Payne <spayne@nvidia.com>
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