Searched hist:"81 f98bbd62b66e4a590fe6fe9b0d8231e45beffd" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/mips/include/asm/ |
| H A D | malta.h | 81f98bbd62b66e4a590fe6fe9b0d8231e45beffd Fri Nov 08 11:18:57 UTC 2013 Paul Burton <paul.burton@imgtec.com> malta: setup PIIX4 interrupt route
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader, reading back the IRQ lines which
the PIRQ[A:D] signals have been routed to.
This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11.
This matches the setup used by YAMON.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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| /rk3399_rockchip-uboot/board/imgtec/malta/ |
| H A D | malta.c | 81f98bbd62b66e4a590fe6fe9b0d8231e45beffd Fri Nov 08 11:18:57 UTC 2013 Paul Burton <paul.burton@imgtec.com> malta: setup PIIX4 interrupt route
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader, reading back the IRQ lines which
the PIRQ[A:D] signals have been routed to.
This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11.
This matches the setup used by YAMON.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
|