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| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | sh_qspi.c | 7f3cd1e4f8010ae7bed52343c6fc5a6b4ea16e05 Tue Apr 10 14:43:47 UTC 2018 Marek Vasut <marek.vasut+renesas@gmail.com> UPSTREAM: spi: sh_qspi: Make use of the 32byte FIFO
The QSPI controller on RCar Gen2 has 32byte FIFO. Instead of doing
the SPI transmission 1 byte at time, if there is a 32byte chunk of
data to be transferred, fill the FIFO completely and then transfer
the data to/from the FIFO. This increases the SPI NOR access speed
significantly.
Change-Id: Idc0280488ce052492579ee8e52f6084aa0840f3b
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit ea5512eb095067dda27930246792d2957feb9434)
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