Home
last modified time | relevance | path

Searched hist:"6 a464ee7754d9b24a9a35668bc5019164267dac7" (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dcortex_x3.S6a464ee7754d9b24a9a35668bc5019164267dac7 Thu Jul 03 21:30:03 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> fix(cpus): workaround for Cortex-X3 erratum 3827463

Cortex-X3 erratum 3827463 is a Cat B erratum that applies to
r0p0, r1p0 and r1p1. It is fixed in r1p2.

This erratum can be avoided by setting CPUACTLR_EL1[1]
prior to enabling MMU. This bit will disable a branch predictor
power savings feature. Disabling this power feature
results in negligible power movement and no performance impact.

SDEN Documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I1d4a2b9641400d8b9061f7cb32a8312c3995613e
/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst6a464ee7754d9b24a9a35668bc5019164267dac7 Thu Jul 03 21:30:03 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> fix(cpus): workaround for Cortex-X3 erratum 3827463

Cortex-X3 erratum 3827463 is a Cat B erratum that applies to
r0p0, r1p0 and r1p1. It is fixed in r1p2.

This erratum can be avoided by setting CPUACTLR_EL1[1]
prior to enabling MMU. This bit will disable a branch predictor
power savings feature. Disabling this power feature
results in negligible power movement and no performance impact.

SDEN Documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I1d4a2b9641400d8b9061f7cb32a8312c3995613e
/rk3399_ARM-atf/lib/cpus/
H A Dcpu-ops.mk6a464ee7754d9b24a9a35668bc5019164267dac7 Thu Jul 03 21:30:03 UTC 2025 Arvind Ram Prakash <arvind.ramprakash@arm.com> fix(cpus): workaround for Cortex-X3 erratum 3827463

Cortex-X3 erratum 3827463 is a Cat B erratum that applies to
r0p0, r1p0 and r1p1. It is fixed in r1p2.

This erratum can be avoided by setting CPUACTLR_EL1[1]
prior to enabling MMU. This bit will disable a branch predictor
power savings feature. Disabling this power feature
results in negligible power movement and no performance impact.

SDEN Documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I1d4a2b9641400d8b9061f7cb32a8312c3995613e