Searched hist:"59 dcf970d11ebff5d9f4bbbde79fda584e9e7ad4" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/board/phytec/pcm051/ |
| H A D | board.c | cecac32a06a71bc27fbcc8b5491400836952302d Wed Apr 03 04:37:52 UTC 2013 Lars Poeschel <poeschel@lemonage.de> pcm051: Enable DDR PHY dynamic power down bit
This is done already for am335x in
59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 and also applies for pcm051.
It powers down the IO receiver when not performing read which helps
reducing the overall power consuption in low power states
(suspend/standby).
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-am33xx/ |
| H A D | ddr_defs.h | 59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 Thu Mar 14 21:11:16 UTC 2013 Vaibhav Hiremath <hvaibhav@ti.com> am335x: Enable DDR PHY dynamic power down bit for DDR3 boards
Enable DDR PHY dynamic power down bit, which enables
powering down the IO receiver when not performing read.
This also helps in reducing overall power consumption in
low power states (suspend/standby).
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
|
| /rk3399_rockchip-uboot/board/ti/am335x/ |
| H A D | board.c | 59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 Thu Mar 14 21:11:16 UTC 2013 Vaibhav Hiremath <hvaibhav@ti.com> am335x: Enable DDR PHY dynamic power down bit for DDR3 boards
Enable DDR PHY dynamic power down bit, which enables
powering down the IO receiver when not performing read.
This also helps in reducing overall power consumption in
low power states (suspend/standby).
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
|