Searched hist:"58 fadd62beba8e9fefddae884bfd34f71a183997" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/lib/extensions/sysreg128/ |
| H A D | sysreg128.S | 58fadd62beba8e9fefddae884bfd34f71a183997 Fri Nov 15 14:20:50 UTC 2024 Igor Podgainõi <igor.podgainoi@arm.com> fix: add support for 128-bit sysregs to EL3 crash handler
The following changes have been made:
* Add new sysreg definitions and ASM macro is_feat_sysreg128_present_asm
* Add registers TTBR0_EL2 and VTTBR_EL2 to EL3 crash handler output
* Use MRRS instead of MRS for registers TTBR0_EL1, TTBR0_EL2, TTBR1_EL1,
VTTBR_EL2 and PAR_EL1
Change-Id: I0e20b2c35251f3afba2df794c1f8bc0c46c197ff
Signed-off-by: Igor Podgainõi <igor.podgainoi@arm.com>
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| /rk3399_ARM-atf/bl31/aarch64/ |
| H A D | crash_reporting.S | 58fadd62beba8e9fefddae884bfd34f71a183997 Fri Nov 15 14:20:50 UTC 2024 Igor Podgainõi <igor.podgainoi@arm.com> fix: add support for 128-bit sysregs to EL3 crash handler
The following changes have been made:
* Add new sysreg definitions and ASM macro is_feat_sysreg128_present_asm
* Add registers TTBR0_EL2 and VTTBR_EL2 to EL3 crash handler output
* Use MRRS instead of MRS for registers TTBR0_EL1, TTBR0_EL2, TTBR1_EL1,
VTTBR_EL2 and PAR_EL1
Change-Id: I0e20b2c35251f3afba2df794c1f8bc0c46c197ff
Signed-off-by: Igor Podgainõi <igor.podgainoi@arm.com>
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| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | asm_macros.S | 58fadd62beba8e9fefddae884bfd34f71a183997 Fri Nov 15 14:20:50 UTC 2024 Igor Podgainõi <igor.podgainoi@arm.com> fix: add support for 128-bit sysregs to EL3 crash handler
The following changes have been made:
* Add new sysreg definitions and ASM macro is_feat_sysreg128_present_asm
* Add registers TTBR0_EL2 and VTTBR_EL2 to EL3 crash handler output
* Use MRRS instead of MRS for registers TTBR0_EL1, TTBR0_EL2, TTBR1_EL1,
VTTBR_EL2 and PAR_EL1
Change-Id: I0e20b2c35251f3afba2df794c1f8bc0c46c197ff
Signed-off-by: Igor Podgainõi <igor.podgainoi@arm.com>
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| H A D | arch.h | 58fadd62beba8e9fefddae884bfd34f71a183997 Fri Nov 15 14:20:50 UTC 2024 Igor Podgainõi <igor.podgainoi@arm.com> fix: add support for 128-bit sysregs to EL3 crash handler
The following changes have been made:
* Add new sysreg definitions and ASM macro is_feat_sysreg128_present_asm
* Add registers TTBR0_EL2 and VTTBR_EL2 to EL3 crash handler output
* Use MRRS instead of MRS for registers TTBR0_EL1, TTBR0_EL2, TTBR1_EL1,
VTTBR_EL2 and PAR_EL1
Change-Id: I0e20b2c35251f3afba2df794c1f8bc0c46c197ff
Signed-off-by: Igor Podgainõi <igor.podgainoi@arm.com>
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