130655136SGovindraj Raja/* 2*58fadd62SIgor Podgainõi * Copyright (c) 2025, Arm Limited. All rights reserved. 330655136SGovindraj Raja * 430655136SGovindraj Raja * SPDX-License-Identifier: BSD-3-Clause 530655136SGovindraj Raja */ 630655136SGovindraj Raja 730655136SGovindraj Raja#include <arch.h> 830655136SGovindraj Raja#include <asm_macros.S> 930655136SGovindraj Raja#include <lib/extensions/sysreg128.h> 1030655136SGovindraj Raja 1130655136SGovindraj Raja .global read_par_el1 1230655136SGovindraj Raja .global write_par_el1 1330655136SGovindraj Raja .global read_ttbr0_el1 1430655136SGovindraj Raja .global write_ttbr0_el1 1530655136SGovindraj Raja .global read_ttbr1_el1 1630655136SGovindraj Raja .global write_ttbr1_el1 1730655136SGovindraj Raja .global read_ttbr0_el2 1830655136SGovindraj Raja .global write_ttbr0_el2 1930655136SGovindraj Raja .global read_ttbr1_el2 2030655136SGovindraj Raja .global write_ttbr1_el2 2130655136SGovindraj Raja .global read_vttbr_el2 2230655136SGovindraj Raja .global write_vttbr_el2 2330655136SGovindraj Raja .global read_rcwmask_el1 2430655136SGovindraj Raja .global write_rcwmask_el1 2530655136SGovindraj Raja .global read_rcwsmask_el1 2630655136SGovindraj Raja .global write_rcwsmask_el1 2730655136SGovindraj Raja 2830655136SGovindraj Raja/* 2930655136SGovindraj Raja * _mrrs - Move System register to two adjacent general-purpose 3030655136SGovindraj Raja * registers. 3130655136SGovindraj Raja * Instruction: MRRS <Xt>, <Xt+1>, (<systemreg>|S<op0>_<op1>_<Cn>_<Cm>_<op2>) 3230655136SGovindraj Raja * 3330655136SGovindraj Raja * Arguments/Opcode bit field: 3430655136SGovindraj Raja * regins: System register opcode. 3530655136SGovindraj Raja * 3630655136SGovindraj Raja * Clobbers: x0,x1,x2 3730655136SGovindraj Raja */ 3830655136SGovindraj Raja.macro _mrrs regins:req 3930655136SGovindraj Raja#if ENABLE_FEAT_D128 == 2 40*58fadd62SIgor Podgainõi is_feat_sysreg128_present_asm x0 4130655136SGovindraj Raja bne 1f 42*58fadd62SIgor Podgainõi /* If FEAT_SYSREG128 is not implemented then use mrs */ 43*58fadd62SIgor Podgainõi .inst 0xD5300000 | (\regins) /* mrs x0, \regins */ 4430655136SGovindraj Raja ret 4530655136SGovindraj Raja#endif 4630655136SGovindraj Raja1: 47*58fadd62SIgor Podgainõi .inst 0xD5700000 | (\regins) /* mrrs x0, x1, \regins */ 4830655136SGovindraj Raja ret 4930655136SGovindraj Raja.endm 5030655136SGovindraj Raja 5130655136SGovindraj Raja/* 5230655136SGovindraj Raja * _msrr - Move two adjacent general-purpose registers to System register. 5330655136SGovindraj Raja * Instruction: MSRR (<systemreg>|S<op0>_<op1>_<Cn>_<Cm>_<op2>), <Xt>, <Xt+1> 5430655136SGovindraj Raja * 5530655136SGovindraj Raja * Arguments/Opcode bit field: 5630655136SGovindraj Raja * regins: System register opcode. 5730655136SGovindraj Raja * 5830655136SGovindraj Raja * Clobbers: x0,x1,x2 5930655136SGovindraj Raja */ 6030655136SGovindraj Raja.macro _msrr regins:req 6130655136SGovindraj Raja#if ENABLE_FEAT_D128 == 2 62*58fadd62SIgor Podgainõi /* Don't tamper x0 and x1 as they may be used for msrr */ 63*58fadd62SIgor Podgainõi is_feat_sysreg128_present_asm x2 6430655136SGovindraj Raja bne 1f 65*58fadd62SIgor Podgainõi /* If FEAT_SYSREG128 is not implemented then use msr */ 66*58fadd62SIgor Podgainõi .inst 0xD5100000 | (\regins) /* msr \regins, x0 */ 6730655136SGovindraj Raja ret 6830655136SGovindraj Raja#endif 6930655136SGovindraj Raja1: 70*58fadd62SIgor Podgainõi .inst 0xD5500000 | (\regins) /* msrr \regins, x0, x1 */ 7130655136SGovindraj Raja ret 7230655136SGovindraj Raja.endm 7330655136SGovindraj Raja 7430655136SGovindraj Rajafunc read_par_el1 7530655136SGovindraj Raja _mrrs 0x87400 /* S3_0_C7_C4_0 */ 7630655136SGovindraj Rajaendfunc read_par_el1 7730655136SGovindraj Raja 7830655136SGovindraj Rajafunc write_par_el1 7930655136SGovindraj Raja _msrr 0x87400 8030655136SGovindraj Rajaendfunc write_par_el1 8130655136SGovindraj Raja 8230655136SGovindraj Rajafunc read_ttbr0_el1 8330655136SGovindraj Raja _mrrs 0x82000 /* S3_0_C2_C0_0 */ 8430655136SGovindraj Rajaendfunc read_ttbr0_el1 8530655136SGovindraj Raja 8630655136SGovindraj Rajafunc write_ttbr0_el1 8730655136SGovindraj Raja _msrr 0x82000 8830655136SGovindraj Rajaendfunc write_ttbr0_el1 8930655136SGovindraj Raja 9030655136SGovindraj Rajafunc read_ttbr1_el1 9130655136SGovindraj Raja _mrrs 0x82020 /* S3_0_C2_C0_1 */ 9230655136SGovindraj Rajaendfunc read_ttbr1_el1 9330655136SGovindraj Raja 9430655136SGovindraj Rajafunc write_ttbr1_el1 9530655136SGovindraj Raja _msrr 0x82020 9630655136SGovindraj Rajaendfunc write_ttbr1_el1 9730655136SGovindraj Raja 9830655136SGovindraj Rajafunc read_ttbr0_el2 9930655136SGovindraj Raja _mrrs 0xC2000 /* S3_4_C2_C0_0 */ 10030655136SGovindraj Rajaendfunc read_ttbr0_el2 10130655136SGovindraj Raja 10230655136SGovindraj Rajafunc write_ttbr0_el2 10330655136SGovindraj Raja _msrr 0xC2000 10430655136SGovindraj Rajaendfunc write_ttbr0_el2 10530655136SGovindraj Raja 10630655136SGovindraj Rajafunc read_ttbr1_el2 10730655136SGovindraj Raja _mrrs 0xC2020 /* S3_4_C2_C0_1 */ 10830655136SGovindraj Rajaendfunc read_ttbr1_el2 10930655136SGovindraj Raja 11030655136SGovindraj Rajafunc write_ttbr1_el2 11130655136SGovindraj Raja _msrr 0xC2020 11230655136SGovindraj Rajaendfunc write_ttbr1_el2 11330655136SGovindraj Raja 11430655136SGovindraj Rajafunc read_vttbr_el2 11530655136SGovindraj Raja _mrrs 0xC2100 /* S3_4_C2_C1_0 */ 11630655136SGovindraj Rajaendfunc read_vttbr_el2 11730655136SGovindraj Raja 11830655136SGovindraj Rajafunc write_vttbr_el2 11930655136SGovindraj Raja _msrr 0xC2100 12030655136SGovindraj Rajaendfunc write_vttbr_el2 12130655136SGovindraj Raja 12230655136SGovindraj Rajafunc read_rcwmask_el1 12330655136SGovindraj Raja _mrrs 0x8D0C0 /* S3_0_C13_C0_6 */ 12430655136SGovindraj Rajaendfunc read_rcwmask_el1 12530655136SGovindraj Raja 12630655136SGovindraj Rajafunc write_rcwmask_el1 12730655136SGovindraj Raja _msrr 0x8D0C0 12830655136SGovindraj Rajaendfunc write_rcwmask_el1 12930655136SGovindraj Raja 13030655136SGovindraj Rajafunc read_rcwsmask_el1 13130655136SGovindraj Raja _mrrs 0x8D060 /* S3_0_C13_C0_3 */ 13230655136SGovindraj Rajaendfunc read_rcwsmask_el1 13330655136SGovindraj Raja 13430655136SGovindraj Rajafunc write_rcwsmask_el1 13530655136SGovindraj Raja _msrr 0x8D060 13630655136SGovindraj Rajaendfunc write_rcwsmask_el1 137