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/rkbin/RKBOOT/
H A DPX30MINIALL_WO_FTL.ini5579d203ece5f90247ea017cf6d59555f3f19ad6 Mon May 13 09:40:25 UTC 2024 Zhihuan He <huan.he@rock-chips.com> px30: ddr: Update to DDR 20240527 fwver: v2.10

build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10

update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s/px30s: set cke low before clk for lp3

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Idc674e20d57d332928b73dc34ce0c08f6e66e858
H A DPX30MINIALL_SLC.ini5579d203ece5f90247ea017cf6d59555f3f19ad6 Mon May 13 09:40:25 UTC 2024 Zhihuan He <huan.he@rock-chips.com> px30: ddr: Update to DDR 20240527 fwver: v2.10

build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10

update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s/px30s: set cke low before clk for lp3

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Idc674e20d57d332928b73dc34ce0c08f6e66e858
H A DPX30MINIALL.ini5579d203ece5f90247ea017cf6d59555f3f19ad6 Mon May 13 09:40:25 UTC 2024 Zhihuan He <huan.he@rock-chips.com> px30: ddr: Update to DDR 20240527 fwver: v2.10

build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10

update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s/px30s: set cke low before clk for lp3

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Idc674e20d57d332928b73dc34ce0c08f6e66e858
/rkbin/doc/release/
H A DPX30_CN.md5579d203ece5f90247ea017cf6d59555f3f19ad6 Mon May 13 09:40:25 UTC 2024 Zhihuan He <huan.he@rock-chips.com> px30: ddr: Update to DDR 20240527 fwver: v2.10

build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10

update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s/px30s: set cke low before clk for lp3

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Idc674e20d57d332928b73dc34ce0c08f6e66e858
H A DPX30_EN.md5579d203ece5f90247ea017cf6d59555f3f19ad6 Mon May 13 09:40:25 UTC 2024 Zhihuan He <huan.he@rock-chips.com> px30: ddr: Update to DDR 20240527 fwver: v2.10

build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10

update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s/px30s: set cke low before clk for lp3

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Idc674e20d57d332928b73dc34ce0c08f6e66e858