Searched hist:"511148 ef5077dfb8f6bc7b9655e4ac19e16c4af0" (Results 1 – 5 of 5) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_x925.h | 511148ef5077dfb8f6bc7b9655e4ac19e16c4af0 Wed Jan 22 00:38:56 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> fix(cpus): workaround for Cortex-X925 erratum 3701747
Cortex-X925 erratum 3701747 that applies to r0p0, r0p1 and is still
Open.
The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.
SDEN documentation:
https://developer.arm.com/documentation/109180/latest/
Change-Id: I080296666f89276b3260686c2bdb8de63fc174c1
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_x925.S | 511148ef5077dfb8f6bc7b9655e4ac19e16c4af0 Wed Jan 22 00:38:56 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> fix(cpus): workaround for Cortex-X925 erratum 3701747
Cortex-X925 erratum 3701747 that applies to r0p0, r0p1 and is still
Open.
The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.
SDEN documentation:
https://developer.arm.com/documentation/109180/latest/
Change-Id: I080296666f89276b3260686c2bdb8de63fc174c1
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | errata_common.c | 511148ef5077dfb8f6bc7b9655e4ac19e16c4af0 Wed Jan 22 00:38:56 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> fix(cpus): workaround for Cortex-X925 erratum 3701747
Cortex-X925 erratum 3701747 that applies to r0p0, r0p1 and is still
Open.
The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.
SDEN documentation:
https://developer.arm.com/documentation/109180/latest/
Change-Id: I080296666f89276b3260686c2bdb8de63fc174c1
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| H A D | cpu-ops.mk | 511148ef5077dfb8f6bc7b9655e4ac19e16c4af0 Wed Jan 22 00:38:56 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> fix(cpus): workaround for Cortex-X925 erratum 3701747
Cortex-X925 erratum 3701747 that applies to r0p0, r0p1 and is still
Open.
The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.
SDEN documentation:
https://developer.arm.com/documentation/109180/latest/
Change-Id: I080296666f89276b3260686c2bdb8de63fc174c1
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 511148ef5077dfb8f6bc7b9655e4ac19e16c4af0 Wed Jan 22 00:38:56 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> fix(cpus): workaround for Cortex-X925 erratum 3701747
Cortex-X925 erratum 3701747 that applies to r0p0, r0p1 and is still
Open.
The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.
SDEN documentation:
https://developer.arm.com/documentation/109180/latest/
Change-Id: I080296666f89276b3260686c2bdb8de63fc174c1
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|