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H A Dzynq_gem.c4eaf8f5424ccfc2c285a70b9a337e5b39d9e39e7 Mon May 16 10:01:38 UTC 2016 Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> net: zynq_gem: Correct SGMII enable bit setting

Correct the SGMII enable bit position to 27 instead
of 31.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>