Searched hist:"4 b9f6a669ee22ac4694a3a339e94e8fe30bfad1f" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/arch/x86/include/asm/ |
| H A D | mrccache.h | 4b9f6a669ee22ac4694a3a339e94e8fe30bfad1f Mon Oct 12 04:37:41 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: Use struct mrc_region to describe a mrc region
Currently struct fmap_entry is used to describe a mrc region.
However this structure contains some other fields that are not
related to mrc cache and causes confusion. Besides, it does not
include a base address field to store SPI flash's base address.
Instead in the mrccache.c it tries to use CONFIG_ROM_SIZE to
calculate the SPI flash base address, which unfortunately is
not 100% correct as CONFIG_ROM_SIZE may not match the whole
SPI flash size.
Define a new struct mrc_region and use it instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| /rk3399_rockchip-uboot/arch/x86/lib/ |
| H A D | mrccache.c | 4b9f6a669ee22ac4694a3a339e94e8fe30bfad1f Mon Oct 12 04:37:41 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: Use struct mrc_region to describe a mrc region
Currently struct fmap_entry is used to describe a mrc region.
However this structure contains some other fields that are not
related to mrc cache and causes confusion. Besides, it does not
include a base address field to store SPI flash's base address.
Instead in the mrccache.c it tries to use CONFIG_ROM_SIZE to
calculate the SPI flash base address, which unfortunately is
not 100% correct as CONFIG_ROM_SIZE may not match the whole
SPI flash size.
Define a new struct mrc_region and use it instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| /rk3399_rockchip-uboot/arch/x86/cpu/ivybridge/ |
| H A D | sdram.c | 4b9f6a669ee22ac4694a3a339e94e8fe30bfad1f Mon Oct 12 04:37:41 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: Use struct mrc_region to describe a mrc region
Currently struct fmap_entry is used to describe a mrc region.
However this structure contains some other fields that are not
related to mrc cache and causes confusion. Besides, it does not
include a base address field to store SPI flash's base address.
Instead in the mrccache.c it tries to use CONFIG_ROM_SIZE to
calculate the SPI flash base address, which unfortunately is
not 100% correct as CONFIG_ROM_SIZE may not match the whole
SPI flash size.
Define a new struct mrc_region and use it instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|