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H A Dspl.c4a0080d98517a3d9b423a319331e73975b43b706 Thu Jul 09 02:48:56 UTC 2015 Marek Vasut <marex@denx.de> arm: socfpga: spl: Toggle warm reset config I/O bit

Synchronise the SPL behavior with the original Altera code and
toggle the Warm Reset Config I/O bit accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>