Searched hist:"45 f41c134baf5ff1bbf59d33027f6c79884fa4d9" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/mach-uniphier/arm64/ |
| H A D | lowlevel_init.S | 45f41c134baf5ff1bbf59d33027f6c79884fa4d9 Fri May 12 13:49:02 UTC 2017 Masahiro Yamada <yamada.masahiro@socionext.com> ARM: uniphier: add weird workaround code for LD20
When booting from ARM Trusted Firmware, U-Boot runs in EL1-NS.
The boot flow is as follows:
BL1 -> BL2 -> BL31 -> BL33 (i.e. U-Boot)
This boot sequence works fine for LD11 SoC (Cortex-A53), but LD20
SoC (Cortex-A72) hangs in U-Boot. The solution I found is to
read sctlr_el1 and write back the value as-is. This should be
no effect, but surprisingly fixes the problem for LD20 to boot.
I do not know why.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
| H A D | Makefile | 45f41c134baf5ff1bbf59d33027f6c79884fa4d9 Fri May 12 13:49:02 UTC 2017 Masahiro Yamada <yamada.masahiro@socionext.com> ARM: uniphier: add weird workaround code for LD20
When booting from ARM Trusted Firmware, U-Boot runs in EL1-NS.
The boot flow is as follows:
BL1 -> BL2 -> BL31 -> BL33 (i.e. U-Boot)
This boot sequence works fine for LD11 SoC (Cortex-A53), but LD20
SoC (Cortex-A72) hangs in U-Boot. The solution I found is to
read sctlr_el1 and write back the value as-is. This should be
no effect, but surprisingly fixes the problem for LD20 to boot.
I do not know why.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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