| #
f19955a0 |
| 26-Jul-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-uniphier
|
| #
ee8d037c |
| 13-Jul-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: uniphier: remove SPL support for ARMv8 SoCs
It has been a while since ARM Trusted Firmware supported UniPhier SoC
family. U-Boot SPL was intended as a temporary loader that runs in
secure worl
ARM: uniphier: remove SPL support for ARMv8 SoCs
It has been a while since ARM Trusted Firmware supported UniPhier SoC
family. U-Boot SPL was intended as a temporary loader that runs in
secure world. It is a maintenance headache to support two different
boot mechanisms. Secure firmware is realm of ARM Trusted Firmware
and now U-Boot only serves as a non-secure boot loader for UniPhier
ARMv8 SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
show more ...
|
| #
fa8967cf |
| 17-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-uniphier
- Add workaround code to make LD20 SoC boot from ARM Trusted Firmware
- Sync DT with Linux to fix DTC warnings
- Add new SoC support code
- Misc fix, updates
|
| #
45f41c13 |
| 12-May-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: uniphier: add weird workaround code for LD20
When booting from ARM Trusted Firmware, U-Boot runs in EL1-NS.
The boot flow is as follows:
BL1 -> BL2 -> BL31 -> BL33 (i.e. U-Boot)
This boot se
ARM: uniphier: add weird workaround code for LD20
When booting from ARM Trusted Firmware, U-Boot runs in EL1-NS.
The boot flow is as follows:
BL1 -> BL2 -> BL31 -> BL33 (i.e. U-Boot)
This boot sequence works fine for LD11 SoC (Cortex-A53), but LD20
SoC (Cortex-A72) hangs in U-Boot. The solution I found is to
read sctlr_el1 and write back the value as-is. This should be
no effect, but surprisingly fixes the problem for LD20 to boot.
I do not know why.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
show more ...
|
| #
0c9e85f6 |
| 22-Jan-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Allow to disable SPL (mainly for ATF)
- Refactor SoC init code
- Update DRAM settings
- Add PXs3 SoC support (DT, pinctrl driver,
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Allow to disable SPL (mainly for ATF)
- Refactor SoC init code
- Update DRAM settings
- Add PXs3 SoC support (DT, pinctrl driver, SoC code)
show more ...
|
| #
561ca649 |
| 21-Jan-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: uniphier: make SPL optional for ARVv8 SoCs
We may want to run different firmware before running U-Boot. For
example, ARM Trusted Firmware runs before U-Boot, making U-Boot
a non-secure world b
ARM: uniphier: make SPL optional for ARVv8 SoCs
We may want to run different firmware before running U-Boot. For
example, ARM Trusted Firmware runs before U-Boot, making U-Boot
a non-secure world boot loader. In this case, the SoC might be
initialized there, which enables us to skip SPL entirely.
This commit removes "select SPL" to make it configurable. This
also enables the Multi SoC support for the UniPhier ARMv8 SoCs.
(CONFIG_ARCH_UNIPHIER_V8_MULTI) Thanks to the driver model and
Device Tree, the U-Boot proper part is now written in a generic way.
The board/SoC parameters reside in DT. The Multi SoC support
increases the memory footprint a bit, but the U-Boot proper does
not have strict memory constraint. This will mitigate the per-SoC
(sometimes per-board) defconfig burden.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
show more ...
|
| #
9f69ab86 |
| 25-Apr-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-uniphier
|
| #
9d0c2ceb |
| 21-Apr-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: uniphier: add PH1-LD20 SoC support
This is the first ARMv8 SoC from Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|