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/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra/
H A Dclk_rst.h41cd530d6d9b4fb3c2ab475cb92f1242400b5fb1 Fri Jan 24 19:46:07 UTC 2014 Stephen Warren <swarren@nvidia.com> ARM: tegra: misc cleanups triggered by Tegra124 review

Use a named constant for the PLL lock bit in enable_cpu_clocks().

Construct the complete value of pmc_pwrgate_toggle, rather than doing a
read-modify-write; the register is simple enough and doesn't need to
maintain state between operations.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>