Searched hist:"3 b2dd5de375e8ce0e0c9a9ffb2c5965a7582c4ea" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/drivers/usb/dwc3/ |
| H A D | core.h | 3b2dd5de375e8ce0e0c9a9ffb2c5965a7582c4ea Fri Nov 13 10:17:26 UTC 2020 William Wu <william.wu@rock-chips.com> usb: dwc3: do not use 3.0 clock when operating in 2.0 mode
In the 3.0 device core, if the core is programmed to operate in
2.0 only, then setting the GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK makes
the internal 2.0(utmi/ulpi) clock to be routed as the 3.0 (pipe)
clock. Enabling this feature allows the pipe3 clock to be not-running
when forcibly operating in 2.0 device mode.
Change-Id: Ib93da14b5309ec094b952e03f8514817910fedfa
Signed-off-by: William Wu <william.wu@rock-chips.com>
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| H A D | core.c | 3b2dd5de375e8ce0e0c9a9ffb2c5965a7582c4ea Fri Nov 13 10:17:26 UTC 2020 William Wu <william.wu@rock-chips.com> usb: dwc3: do not use 3.0 clock when operating in 2.0 mode
In the 3.0 device core, if the core is programmed to operate in
2.0 only, then setting the GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK makes
the internal 2.0(utmi/ulpi) clock to be routed as the 3.0 (pipe)
clock. Enabling this feature allows the pipe3 clock to be not-running
when forcibly operating in 2.0 device mode.
Change-Id: Ib93da14b5309ec094b952e03f8514817910fedfa
Signed-off-by: William Wu <william.wu@rock-chips.com>
|