Searched hist:"385 f1dbb294b36c5fbdbbf3d10b6cb105239a76e" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/drivers/arm/gic/v2/ |
| H A D | gicv2_main.c | 385f1dbb294b36c5fbdbbf3d10b6cb105239a76e Tue Nov 07 08:38:23 UTC 2017 Jeenu Viswambharan <jeenu.viswambharan@arm.com> GIC: Fix Group 0 enabling
At present, the GIC drivers enable Group 0 interrupts only if there are
Secure SPIs listed in the interrupt properties/list. This means that,
even if there are Group 0 SGIs/PPIs configured, the group remained
disabled in the absence of a Group 0 SPI.
Modify both GICv2 and GICv3 SGI/PPI configuration to enable Group 0 when
corresponding SGIs/PPIs are present.
Change-Id: Id123e8aaee0c22b476eebe3800340906d83bbc6d
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|
| /rk3399_ARM-atf/drivers/arm/gic/v3/ |
| H A D | gicv3_private.h | 385f1dbb294b36c5fbdbbf3d10b6cb105239a76e Tue Nov 07 08:38:23 UTC 2017 Jeenu Viswambharan <jeenu.viswambharan@arm.com> GIC: Fix Group 0 enabling
At present, the GIC drivers enable Group 0 interrupts only if there are
Secure SPIs listed in the interrupt properties/list. This means that,
even if there are Group 0 SGIs/PPIs configured, the group remained
disabled in the absence of a Group 0 SPI.
Modify both GICv2 and GICv3 SGI/PPI configuration to enable Group 0 when
corresponding SGIs/PPIs are present.
Change-Id: Id123e8aaee0c22b476eebe3800340906d83bbc6d
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|
| H A D | gicv3_helpers.c | 385f1dbb294b36c5fbdbbf3d10b6cb105239a76e Tue Nov 07 08:38:23 UTC 2017 Jeenu Viswambharan <jeenu.viswambharan@arm.com> GIC: Fix Group 0 enabling
At present, the GIC drivers enable Group 0 interrupts only if there are
Secure SPIs listed in the interrupt properties/list. This means that,
even if there are Group 0 SGIs/PPIs configured, the group remained
disabled in the absence of a Group 0 SPI.
Modify both GICv2 and GICv3 SGI/PPI configuration to enable Group 0 when
corresponding SGIs/PPIs are present.
Change-Id: Id123e8aaee0c22b476eebe3800340906d83bbc6d
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|
| H A D | gicv3_main.c | 385f1dbb294b36c5fbdbbf3d10b6cb105239a76e Tue Nov 07 08:38:23 UTC 2017 Jeenu Viswambharan <jeenu.viswambharan@arm.com> GIC: Fix Group 0 enabling
At present, the GIC drivers enable Group 0 interrupts only if there are
Secure SPIs listed in the interrupt properties/list. This means that,
even if there are Group 0 SGIs/PPIs configured, the group remained
disabled in the absence of a Group 0 SPI.
Modify both GICv2 and GICv3 SGI/PPI configuration to enable Group 0 when
corresponding SGIs/PPIs are present.
Change-Id: Id123e8aaee0c22b476eebe3800340906d83bbc6d
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|