Home
last modified time | relevance | path

Searched hist:"35 efe7a4cea4b3c55b661aac49ef1a85ca8feaa9" (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/nxp/common/setup/
H A Dcore.mk35efe7a4cea4b3c55b661aac49ef1a85ca8feaa9 Fri Sep 10 10:54:56 UTC 2021 Jiafei Pan <Jiafei.Pan@nxp.com> feat(plat/nxp/common): define common macro for ARM registers

Define common register macro both for Cortex-A53 and Cortex-A72
because the code will be used by both Cortex platform.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I485661bfe3ed4f214c403ff6af53dc6af1ddf089
/rk3399_ARM-atf/plat/nxp/common/psci/aarch64/
H A Dpsci_utils.S35efe7a4cea4b3c55b661aac49ef1a85ca8feaa9 Fri Sep 10 10:54:56 UTC 2021 Jiafei Pan <Jiafei.Pan@nxp.com> feat(plat/nxp/common): define common macro for ARM registers

Define common register macro both for Cortex-A53 and Cortex-A72
because the code will be used by both Cortex platform.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I485661bfe3ed4f214c403ff6af53dc6af1ddf089
/rk3399_ARM-atf/plat/nxp/common/psci/include/
H A Dplat_psci.h35efe7a4cea4b3c55b661aac49ef1a85ca8feaa9 Fri Sep 10 10:54:56 UTC 2021 Jiafei Pan <Jiafei.Pan@nxp.com> feat(plat/nxp/common): define common macro for ARM registers

Define common register macro both for Cortex-A53 and Cortex-A72
because the code will be used by both Cortex platform.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I485661bfe3ed4f214c403ff6af53dc6af1ddf089