| /optee_os/core/arch/arm/dts/ |
| H A D | stm32mp23xc.dtsi | 354d71ce073d856a9379589fe4dadb0e206e7b60 Thu Sep 11 09:34:55 UTC 2025 Thomas Bourgoin <thomas.bourgoin@foss.st.com> dts: stm32: introduce stm32mp23 SoCs family
STM32MP23 family is composed of 3 SoCs defined as following:
-STM32MP231: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ...
-STM32MP233: STM32MP231 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD.
-STM32MP235: STM32MP233 + GPU/AI and video encode/decode, DSI and LDVS
display.
A second diversity layer exists for security features/ A35 frequency:
-STM32MP23xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | stm32mp23xf.dtsi | 354d71ce073d856a9379589fe4dadb0e206e7b60 Thu Sep 11 09:34:55 UTC 2025 Thomas Bourgoin <thomas.bourgoin@foss.st.com> dts: stm32: introduce stm32mp23 SoCs family
STM32MP23 family is composed of 3 SoCs defined as following:
-STM32MP231: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ...
-STM32MP233: STM32MP231 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD.
-STM32MP235: STM32MP233 + GPU/AI and video encode/decode, DSI and LDVS
display.
A second diversity layer exists for security features/ A35 frequency:
-STM32MP23xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | stm32mp233.dtsi | 354d71ce073d856a9379589fe4dadb0e206e7b60 Thu Sep 11 09:34:55 UTC 2025 Thomas Bourgoin <thomas.bourgoin@foss.st.com> dts: stm32: introduce stm32mp23 SoCs family
STM32MP23 family is composed of 3 SoCs defined as following:
-STM32MP231: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ...
-STM32MP233: STM32MP231 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD.
-STM32MP235: STM32MP233 + GPU/AI and video encode/decode, DSI and LDVS
display.
A second diversity layer exists for security features/ A35 frequency:
-STM32MP23xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | stm32mp235.dtsi | 354d71ce073d856a9379589fe4dadb0e206e7b60 Thu Sep 11 09:34:55 UTC 2025 Thomas Bourgoin <thomas.bourgoin@foss.st.com> dts: stm32: introduce stm32mp23 SoCs family
STM32MP23 family is composed of 3 SoCs defined as following:
-STM32MP231: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ...
-STM32MP233: STM32MP231 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD.
-STM32MP235: STM32MP233 + GPU/AI and video encode/decode, DSI and LDVS
display.
A second diversity layer exists for security features/ A35 frequency:
-STM32MP23xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | stm32mp231.dtsi | 354d71ce073d856a9379589fe4dadb0e206e7b60 Thu Sep 11 09:34:55 UTC 2025 Thomas Bourgoin <thomas.bourgoin@foss.st.com> dts: stm32: introduce stm32mp23 SoCs family
STM32MP23 family is composed of 3 SoCs defined as following:
-STM32MP231: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ...
-STM32MP233: STM32MP231 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD.
-STM32MP235: STM32MP233 + GPU/AI and video encode/decode, DSI and LDVS
display.
A second diversity layer exists for security features/ A35 frequency:
-STM32MP23xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|