Searched hist:"2 f721d17339ee22bbc14fb0bb1dad20b82871923" (Results 1 – 1 of 1) sorted by relevance
| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | mxc_spi.c | 2f721d17339ee22bbc14fb0bb1dad20b82871923 Fri Aug 20 10:05:03 UTC 2010 Stefano Babic <sbabic@denx.de> MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51
The actual SPI driver for i.MX31 and i.MX51 controller
use a wrong byte ordering, because it is supposed
to work only with Freescale's devices, as the Power
Controllers (PMIC). The driver is not suitable for
general purposes, because the buffers passed to spi_xfer
must be 32-bit aligned, as it is used mainly to send
integer to PMIC devices.
The patch drops any kind of limitation and makes the
driver useful with devices controlled sending commands
composed by single bytes (or by a odd number of bytes), such as
spi flash, sensor, etc.
Because the byte ordering is changed,
any current driver using this controller must be adapted, too.
Signed-off-by: Stefano Babic <sbabic@denx.de>
|