| /optee_os/core/kernel/ |
| H A D | interrupt.c | 26ed70ec3afa4776dff3df058723e794e5263a6b Tue Nov 29 22:19:29 UTC 2016 Guanchao Liang <liang.guanchao@linaro.org> core: add code for the interrupt framework
With this commit, we add three more GIC APIs for the kernel of OPTEE-OS: itr_raise_sgi : can raise software generate interrupt(SGI) from secure world to no-secure world, or secure world to secure world. It's a quick communication between different worlds and different cores. Because SGI is using the GIC N-N model, so with this API, every core can receive the interrupt if want.
itr_raise_pi : can trigger the peripheral interrupt with the corresponding interrupt number. When sending it to N cores, just one core can receive the effective interrupt.
itr_set_affinity : can target the peripheral interrupt to the core you want, it means that one can bind the interrupt to the corresponding core use this API.
The usage may as follow: itr_raise_sgi(11, 0x1 << 1) it will raise SGI11 to core 1, and if you want not only core 1 can receive SGI11 but also core 2, then you can change the code to itr_raise_sgi(11, 0x1 << 1 || 0x1 << 2).
itr_set_affinity(61, 0x1 << 1) itr_raise_pi(61) These two APIs may use together, the operation set_affinity set the PI61 can just sent to core 1, then raise_pi, core 1 will receive the peripheral interrupt 61.
Signed-off-by: Guanchao Liang <liang.guanchao@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU) [Update commit author to be same as S-o-b: above] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| /optee_os/core/include/kernel/ |
| H A D | interrupt.h | 26ed70ec3afa4776dff3df058723e794e5263a6b Tue Nov 29 22:19:29 UTC 2016 Guanchao Liang <liang.guanchao@linaro.org> core: add code for the interrupt framework
With this commit, we add three more GIC APIs for the kernel of OPTEE-OS: itr_raise_sgi : can raise software generate interrupt(SGI) from secure world to no-secure world, or secure world to secure world. It's a quick communication between different worlds and different cores. Because SGI is using the GIC N-N model, so with this API, every core can receive the interrupt if want.
itr_raise_pi : can trigger the peripheral interrupt with the corresponding interrupt number. When sending it to N cores, just one core can receive the effective interrupt.
itr_set_affinity : can target the peripheral interrupt to the core you want, it means that one can bind the interrupt to the corresponding core use this API.
The usage may as follow: itr_raise_sgi(11, 0x1 << 1) it will raise SGI11 to core 1, and if you want not only core 1 can receive SGI11 but also core 2, then you can change the code to itr_raise_sgi(11, 0x1 << 1 || 0x1 << 2).
itr_set_affinity(61, 0x1 << 1) itr_raise_pi(61) These two APIs may use together, the operation set_affinity set the PI61 can just sent to core 1, then raise_pi, core 1 will receive the peripheral interrupt 61.
Signed-off-by: Guanchao Liang <liang.guanchao@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU) [Update commit author to be same as S-o-b: above] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| /optee_os/core/drivers/ |
| H A D | gic.c | 26ed70ec3afa4776dff3df058723e794e5263a6b Tue Nov 29 22:19:29 UTC 2016 Guanchao Liang <liang.guanchao@linaro.org> core: add code for the interrupt framework
With this commit, we add three more GIC APIs for the kernel of OPTEE-OS: itr_raise_sgi : can raise software generate interrupt(SGI) from secure world to no-secure world, or secure world to secure world. It's a quick communication between different worlds and different cores. Because SGI is using the GIC N-N model, so with this API, every core can receive the interrupt if want.
itr_raise_pi : can trigger the peripheral interrupt with the corresponding interrupt number. When sending it to N cores, just one core can receive the effective interrupt.
itr_set_affinity : can target the peripheral interrupt to the core you want, it means that one can bind the interrupt to the corresponding core use this API.
The usage may as follow: itr_raise_sgi(11, 0x1 << 1) it will raise SGI11 to core 1, and if you want not only core 1 can receive SGI11 but also core 2, then you can change the code to itr_raise_sgi(11, 0x1 << 1 || 0x1 << 2).
itr_set_affinity(61, 0x1 << 1) itr_raise_pi(61) These two APIs may use together, the operation set_affinity set the PI61 can just sent to core 1, then raise_pi, core 1 will receive the peripheral interrupt 61.
Signed-off-by: Guanchao Liang <liang.guanchao@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU) [Update commit author to be same as S-o-b: above] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| /optee_os/core/arch/arm/plat-vexpress/ |
| H A D | main.c | 26ed70ec3afa4776dff3df058723e794e5263a6b Tue Nov 29 22:19:29 UTC 2016 Guanchao Liang <liang.guanchao@linaro.org> core: add code for the interrupt framework
With this commit, we add three more GIC APIs for the kernel of OPTEE-OS: itr_raise_sgi : can raise software generate interrupt(SGI) from secure world to no-secure world, or secure world to secure world. It's a quick communication between different worlds and different cores. Because SGI is using the GIC N-N model, so with this API, every core can receive the interrupt if want.
itr_raise_pi : can trigger the peripheral interrupt with the corresponding interrupt number. When sending it to N cores, just one core can receive the effective interrupt.
itr_set_affinity : can target the peripheral interrupt to the core you want, it means that one can bind the interrupt to the corresponding core use this API.
The usage may as follow: itr_raise_sgi(11, 0x1 << 1) it will raise SGI11 to core 1, and if you want not only core 1 can receive SGI11 but also core 2, then you can change the code to itr_raise_sgi(11, 0x1 << 1 || 0x1 << 2).
itr_set_affinity(61, 0x1 << 1) itr_raise_pi(61) These two APIs may use together, the operation set_affinity set the PI61 can just sent to core 1, then raise_pi, core 1 will receive the peripheral interrupt 61.
Signed-off-by: Guanchao Liang <liang.guanchao@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU) [Update commit author to be same as S-o-b: above] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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