Searched hist:"26 da60e2a0e47768997b1b2079848beb9b5479c6" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/qemu/qemu_sbsa/include/ |
| H A D | platform_def.h | 26da60e2a0e47768997b1b2079848beb9b5479c6 Thu Oct 10 20:08:21 UTC 2024 Mathieu Poirier <mathieu.poirier@linaro.org> feat(qemu-sbsa): dissociate QEMU NS start address and NS_DRAM0_BASE
When RME is enabled the RMM is placed at the bottom of the NS RAM,
meaning that NS_DRAM0_BASE has to be located after that.
This patch disscociates the base of the NS RAM as defined by QEMU by
introducing a new define, PLAT_QEMU_DRAM0_BASE. An offset can be added
to that new define when the software's view of the base memory need to
differ from QEMU.
No change in functionality.
Change-Id: I887f9993d5a61896352cfff17e0d92e2c2b9030a
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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| /rk3399_ARM-atf/plat/qemu/qemu_sbsa/ |
| H A D | platform.mk | 26da60e2a0e47768997b1b2079848beb9b5479c6 Thu Oct 10 20:08:21 UTC 2024 Mathieu Poirier <mathieu.poirier@linaro.org> feat(qemu-sbsa): dissociate QEMU NS start address and NS_DRAM0_BASE
When RME is enabled the RMM is placed at the bottom of the NS RAM,
meaning that NS_DRAM0_BASE has to be located after that.
This patch disscociates the base of the NS RAM as defined by QEMU by
introducing a new define, PLAT_QEMU_DRAM0_BASE. An offset can be added
to that new define when the software's view of the base memory need to
differ from QEMU.
No change in functionality.
Change-Id: I887f9993d5a61896352cfff17e0d92e2c2b9030a
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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