Searched hist:"1 cfde82227558a8cc1792c068bc7a7cdf8feab43" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_x2.S | 1cfde82227558a8cc1792c068bc7a7cdf8feab43 Wed Dec 07 19:54:02 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-X2 erratum 2768515
Cortex-X2 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1775100/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ib02688f7b6dc7f6ec305e68e8895174f6fd577a0
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| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 1cfde82227558a8cc1792c068bc7a7cdf8feab43 Wed Dec 07 19:54:02 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-X2 erratum 2768515
Cortex-X2 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1775100/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ib02688f7b6dc7f6ec305e68e8895174f6fd577a0
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 1cfde82227558a8cc1792c068bc7a7cdf8feab43 Wed Dec 07 19:54:02 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-X2 erratum 2768515
Cortex-X2 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1775100/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ib02688f7b6dc7f6ec305e68e8895174f6fd577a0
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