Searched hist:"17 e84eedb2fb40d8682802cf2e23ddf67928c51d" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/drivers/arm/gic/common/ |
| H A D | gic_common.c | 17e84eedb2fb40d8682802cf2e23ddf67928c51d Thu Mar 22 08:57:52 UTC 2018 Jeenu Viswambharan <jeenu.viswambharan@arm.com> GIC: Fix setting interrupt configuration
- Interrupt configuration is a 2-bit field, so the field shift has to
be double that of the bit number.
- Interrupt configuration (level- or edge-trigger) is specified in the
MSB of the field, not LSB.
Fixes applied to both GICv2 and GICv3 drivers.
Fixes ARM-software/tf-issues#570
Change-Id: Ia6ae6ed9ba9fb0e3eb0f921a833af48e365ba359
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|
| /rk3399_ARM-atf/include/drivers/arm/ |
| H A D | gic_common.h | 17e84eedb2fb40d8682802cf2e23ddf67928c51d Thu Mar 22 08:57:52 UTC 2018 Jeenu Viswambharan <jeenu.viswambharan@arm.com> GIC: Fix setting interrupt configuration
- Interrupt configuration is a 2-bit field, so the field shift has to
be double that of the bit number.
- Interrupt configuration (level- or edge-trigger) is specified in the
MSB of the field, not LSB.
Fixes applied to both GICv2 and GICv3 drivers.
Fixes ARM-software/tf-issues#570
Change-Id: Ia6ae6ed9ba9fb0e3eb0f921a833af48e365ba359
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|
| /rk3399_ARM-atf/drivers/arm/gic/v3/ |
| H A D | gicv3_helpers.c | 17e84eedb2fb40d8682802cf2e23ddf67928c51d Thu Mar 22 08:57:52 UTC 2018 Jeenu Viswambharan <jeenu.viswambharan@arm.com> GIC: Fix setting interrupt configuration
- Interrupt configuration is a 2-bit field, so the field shift has to
be double that of the bit number.
- Interrupt configuration (level- or edge-trigger) is specified in the
MSB of the field, not LSB.
Fixes applied to both GICv2 and GICv3 drivers.
Fixes ARM-software/tf-issues#570
Change-Id: Ia6ae6ed9ba9fb0e3eb0f921a833af48e365ba359
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
|