Searched hist:"1613 d24de33e8f048c9121e06b8544a963324560" (Results 1 – 4 of 4) sorted by relevance
| /rkbin/RKBOOT/ |
| H A D | RV1126MINIALL_LP4_EMMC_TB.ini | 1613d24de33e8f048c9121e06b8544a963324560 Wed Jun 30 14:34:56 UTC 2021 Ziyuan Xu <xzy.xu@rock-chips.com> rv1126: tpl: update thunder boot ddr bin to v1.06
build from next-dev:
b1b9d7fba4 drivers: ram: common: fix ssmod define err
update feature:
b1b9d7fba4 drivers: ram: common: fix ssmod define err
d49e7c3403 drivers: ram: rv1126: fix the judgment of "set ctl address map fail"
06a17b4adf drivers: ram: rv1126: Turn on DQS_c 2k pull-up resistor to workaround WDQS control of LPDDR4/LPDDR4X
246ad23dbf drivers: ram: rk356x: fix read_mr() of LPDDR3
e90784abb2 rv1126: ddr: fix tx dqs bypass phase setting err
c2a03d5d81 drivers: ram: rv1126: add support lpddr4x
bf922fc800 drivers: ram: rv1126: fix calculating of MSCH_DeviceSize
e2dc1cc022 drivers: ram: rv1126: Modify tRFC and related timing based on DDR capacity
330cd12fc3 drivers: ram: rv1126: fix return value of read_mr()
3993b0c711 drivers: ram: rv1126: Set default value of die bus with to x16 when bus width is x16/x32 of DDR3
9050e1f82e drivers: ram: rv1126: fix tZQLAT of LPDDR4
build command:
CONFIG_SPL_KERNEL_BOOT=y
for lpddr3 bin, CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE need set to 6.
for lpddr4 bin, CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE need set to 7.
default CONFIG_ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT=n, if you need
extended temperature bin, you need enable "CONFIG_ROCKCHIP_DRAM\
_EXTENDED_TEMP_SUPPORT", then rebuild uboot.
./make.sh rv1126 && ./make.sh tpl.
Note:
the pre-build 528MHz binary disable ODT.
Change-Id: Ibb384f60d714535822202330d2c3ae3cef75337c
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
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| H A D | RV1126MINIALL_SPI_NOR_TB.ini | 1613d24de33e8f048c9121e06b8544a963324560 Wed Jun 30 14:34:56 UTC 2021 Ziyuan Xu <xzy.xu@rock-chips.com> rv1126: tpl: update thunder boot ddr bin to v1.06
build from next-dev:
b1b9d7fba4 drivers: ram: common: fix ssmod define err
update feature:
b1b9d7fba4 drivers: ram: common: fix ssmod define err
d49e7c3403 drivers: ram: rv1126: fix the judgment of "set ctl address map fail"
06a17b4adf drivers: ram: rv1126: Turn on DQS_c 2k pull-up resistor to workaround WDQS control of LPDDR4/LPDDR4X
246ad23dbf drivers: ram: rk356x: fix read_mr() of LPDDR3
e90784abb2 rv1126: ddr: fix tx dqs bypass phase setting err
c2a03d5d81 drivers: ram: rv1126: add support lpddr4x
bf922fc800 drivers: ram: rv1126: fix calculating of MSCH_DeviceSize
e2dc1cc022 drivers: ram: rv1126: Modify tRFC and related timing based on DDR capacity
330cd12fc3 drivers: ram: rv1126: fix return value of read_mr()
3993b0c711 drivers: ram: rv1126: Set default value of die bus with to x16 when bus width is x16/x32 of DDR3
9050e1f82e drivers: ram: rv1126: fix tZQLAT of LPDDR4
build command:
CONFIG_SPL_KERNEL_BOOT=y
for lpddr3 bin, CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE need set to 6.
for lpddr4 bin, CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE need set to 7.
default CONFIG_ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT=n, if you need
extended temperature bin, you need enable "CONFIG_ROCKCHIP_DRAM\
_EXTENDED_TEMP_SUPPORT", then rebuild uboot.
./make.sh rv1126 && ./make.sh tpl.
Note:
the pre-build 528MHz binary disable ODT.
Change-Id: Ibb384f60d714535822202330d2c3ae3cef75337c
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
|
| H A D | RV1126MINIALL_LP3_EMMC_TB.ini | 1613d24de33e8f048c9121e06b8544a963324560 Wed Jun 30 14:34:56 UTC 2021 Ziyuan Xu <xzy.xu@rock-chips.com> rv1126: tpl: update thunder boot ddr bin to v1.06
build from next-dev:
b1b9d7fba4 drivers: ram: common: fix ssmod define err
update feature:
b1b9d7fba4 drivers: ram: common: fix ssmod define err
d49e7c3403 drivers: ram: rv1126: fix the judgment of "set ctl address map fail"
06a17b4adf drivers: ram: rv1126: Turn on DQS_c 2k pull-up resistor to workaround WDQS control of LPDDR4/LPDDR4X
246ad23dbf drivers: ram: rk356x: fix read_mr() of LPDDR3
e90784abb2 rv1126: ddr: fix tx dqs bypass phase setting err
c2a03d5d81 drivers: ram: rv1126: add support lpddr4x
bf922fc800 drivers: ram: rv1126: fix calculating of MSCH_DeviceSize
e2dc1cc022 drivers: ram: rv1126: Modify tRFC and related timing based on DDR capacity
330cd12fc3 drivers: ram: rv1126: fix return value of read_mr()
3993b0c711 drivers: ram: rv1126: Set default value of die bus with to x16 when bus width is x16/x32 of DDR3
9050e1f82e drivers: ram: rv1126: fix tZQLAT of LPDDR4
build command:
CONFIG_SPL_KERNEL_BOOT=y
for lpddr3 bin, CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE need set to 6.
for lpddr4 bin, CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE need set to 7.
default CONFIG_ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT=n, if you need
extended temperature bin, you need enable "CONFIG_ROCKCHIP_DRAM\
_EXTENDED_TEMP_SUPPORT", then rebuild uboot.
./make.sh rv1126 && ./make.sh tpl.
Note:
the pre-build 528MHz binary disable ODT.
Change-Id: Ibb384f60d714535822202330d2c3ae3cef75337c
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
|
| H A D | RV1126MINIALL_EMMC_TB.ini | 1613d24de33e8f048c9121e06b8544a963324560 Wed Jun 30 14:34:56 UTC 2021 Ziyuan Xu <xzy.xu@rock-chips.com> rv1126: tpl: update thunder boot ddr bin to v1.06
build from next-dev:
b1b9d7fba4 drivers: ram: common: fix ssmod define err
update feature:
b1b9d7fba4 drivers: ram: common: fix ssmod define err
d49e7c3403 drivers: ram: rv1126: fix the judgment of "set ctl address map fail"
06a17b4adf drivers: ram: rv1126: Turn on DQS_c 2k pull-up resistor to workaround WDQS control of LPDDR4/LPDDR4X
246ad23dbf drivers: ram: rk356x: fix read_mr() of LPDDR3
e90784abb2 rv1126: ddr: fix tx dqs bypass phase setting err
c2a03d5d81 drivers: ram: rv1126: add support lpddr4x
bf922fc800 drivers: ram: rv1126: fix calculating of MSCH_DeviceSize
e2dc1cc022 drivers: ram: rv1126: Modify tRFC and related timing based on DDR capacity
330cd12fc3 drivers: ram: rv1126: fix return value of read_mr()
3993b0c711 drivers: ram: rv1126: Set default value of die bus with to x16 when bus width is x16/x32 of DDR3
9050e1f82e drivers: ram: rv1126: fix tZQLAT of LPDDR4
build command:
CONFIG_SPL_KERNEL_BOOT=y
for lpddr3 bin, CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE need set to 6.
for lpddr4 bin, CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE need set to 7.
default CONFIG_ROCKCHIP_DRAM_EXTENDED_TEMP_SUPPORT=n, if you need
extended temperature bin, you need enable "CONFIG_ROCKCHIP_DRAM\
_EXTENDED_TEMP_SUPPORT", then rebuild uboot.
./make.sh rv1126 && ./make.sh tpl.
Note:
the pre-build 528MHz binary disable ODT.
Change-Id: Ibb384f60d714535822202330d2c3ae3cef75337c
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
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