Searched hist:"14 d5da7dccb82fa3b5358431830e247785108782" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/include/linux/usb/ |
| H A D | phy-rockchip-naneng-combphy.h | 14d5da7dccb82fa3b5358431830e247785108782 Thu Oct 19 08:32:25 UTC 2023 william.wu <william.wu@rock-chips.com> phy: rockchip: naneng-combphy: Add usb3 phy init for rockusb
This patch init usb3 phy for rockusb gadget to support super
speed download image. Note that if usb3 phy has been initializd
successfully, we should select clk_usb3otg0_pipe as the source
clock for usb3 otg controller. And if it fail to init usb3 phy,
we should select clk_usb3otg0_utmi as the source clock for usb3
otg controller.
Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
Signed-off-by: william.wu <william.wu@rock-chips.com>
Change-Id: I39d5c863f4f54b27343d033aaea73fb39f873c0d
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| /rk3399_rockchip-uboot/drivers/phy/ |
| H A D | phy-rockchip-naneng-combphy.c | 14d5da7dccb82fa3b5358431830e247785108782 Thu Oct 19 08:32:25 UTC 2023 william.wu <william.wu@rock-chips.com> phy: rockchip: naneng-combphy: Add usb3 phy init for rockusb
This patch init usb3 phy for rockusb gadget to support super
speed download image. Note that if usb3 phy has been initializd
successfully, we should select clk_usb3otg0_pipe as the source
clock for usb3 otg controller. And if it fail to init usb3 phy,
we should select clk_usb3otg0_utmi as the source clock for usb3
otg controller.
Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
Signed-off-by: william.wu <william.wu@rock-chips.com>
Change-Id: I39d5c863f4f54b27343d033aaea73fb39f873c0d
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