Home
last modified time | relevance | path

Searched hist:"12 f6c0649732a35a7ed45ba350a963f09a5710ca" (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/include/arch/aarch64/
H A Del3_common_macros.S12f6c0649732a35a7ed45ba350a963f09a5710ca Fri May 14 10:21:56 UTC 2021 Alexei Fedorov <Alexei.Fedorov@arm.com> fix(security): Set MDCR_EL3.MCCD bit

This patch adds setting MDCR_EL3.MCCD in 'el3_arch_init_common'
macro to disable cycle counting by PMCCNTR_EL0 in EL3 when
FEAT_PMUv3p7 is implemented. This fixes failing test
'Leak PMU CYCLE counter values from EL3 on PSCI suspend SMC'
on FVP models with 'has_v8_7_pmu_extension' parameter set to
1 or 2.

Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Change-Id: I2ad3ef501b31ee11306f76cb5a61032ecfd0fbda
H A Darch.h12f6c0649732a35a7ed45ba350a963f09a5710ca Fri May 14 10:21:56 UTC 2021 Alexei Fedorov <Alexei.Fedorov@arm.com> fix(security): Set MDCR_EL3.MCCD bit

This patch adds setting MDCR_EL3.MCCD in 'el3_arch_init_common'
macro to disable cycle counting by PMCCNTR_EL0 in EL3 when
FEAT_PMUv3p7 is implemented. This fixes failing test
'Leak PMU CYCLE counter values from EL3 on PSCI suspend SMC'
on FVP models with 'has_v8_7_pmu_extension' parameter set to
1 or 2.

Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Change-Id: I2ad3ef501b31ee11306f76cb5a61032ecfd0fbda
/rk3399_ARM-atf/lib/el3_runtime/aarch64/
H A Dcontext.S12f6c0649732a35a7ed45ba350a963f09a5710ca Fri May 14 10:21:56 UTC 2021 Alexei Fedorov <Alexei.Fedorov@arm.com> fix(security): Set MDCR_EL3.MCCD bit

This patch adds setting MDCR_EL3.MCCD in 'el3_arch_init_common'
macro to disable cycle counting by PMCCNTR_EL0 in EL3 when
FEAT_PMUv3p7 is implemented. This fixes failing test
'Leak PMU CYCLE counter values from EL3 on PSCI suspend SMC'
on FVP models with 'has_v8_7_pmu_extension' parameter set to
1 or 2.

Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Change-Id: I2ad3ef501b31ee11306f76cb5a61032ecfd0fbda