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/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/dram/
H A Ddfs.c09f41f8ed68de101702a1045ea2570d6f6975fa3 Thu Dec 15 07:08:47 UTC 2016 Lin Huang <hl@rock-chips.com> rockchip: rk3399: dram: set all ddr frequency pll_postdiv values to 0

The phy pll needs to get 2X frequency to the DDR, so set the
pll_postdiv to 0.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>