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H A Dveymont.S037c7a810f30e4d306cd1dbe7006d83842c72e1f Tue Oct 28 19:22:23 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> feat(cpus): enable Maximum Power Mitigation Mechanism

Add Maximum Power Mitigation Mechanism(MPMM) for Veymont and Caddo
CPUs.

Change-Id: I4beedd9b95e0fe4069d9cfbf8c0211ccbcaf7f90
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
H A Dcaddo.S037c7a810f30e4d306cd1dbe7006d83842c72e1f Tue Oct 28 19:22:23 UTC 2025 Govindraj Raja <govindraj.raja@arm.com> feat(cpus): enable Maximum Power Mitigation Mechanism

Add Maximum Power Mitigation Mechanism(MPMM) for Veymont and Caddo
CPUs.

Change-Id: I4beedd9b95e0fe4069d9cfbf8c0211ccbcaf7f90
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>