Home
last modified time | relevance | path

Searched hist:"02210 f637d6233a74834a6cfc4076b583eb8ab53" (Results 1 – 1 of 1) sorted by relevance

/rk3399_ARM-atf/plat/amd/versal2/pm_service/
H A Dpm_client.c02210f637d6233a74834a6cfc4076b583eb8ab53 Tue Apr 08 12:21:22 UTC 2025 Jay Buddhabhatti <jay.buddhabhatti@amd.com> fix(versal2): fix offsets for apu pcil

The current APU_PCIL offsets for disabling power down and wakeup
interrupts are incorrect. The cpuid passed to the register offset
macro is linear (0-8), but the actual register offsets are
non-linear: 0, 1, 4, 5, 8, 9, 12, 13. As a result, the system
mistakenly disables wakeup and power down interrupts for other
cores. So convert the linear cpuid to a non-linear mapping and
update the APU_PCIL offset macros accordingly.

Change-Id: Ifd823f51d70d9d03fa87cc35ccc733a462eae36a
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>