Searched +full:uniphier +full:- +full:ld20 +full:- +full:dwc3 +full:- +full:glue (Results 1 – 8 of 8) sorted by relevance
1 UniPhier glue reset controller4 Peripheral core reset in glue layer5 -----------------------------------7 Some peripheral core reset belongs to its own glue layer. Before using12 - compatible: Should be13 "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB314 "socionext,uniphier-pro5-usb3-reset" - for Pro5 SoC USB315 "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB316 "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB317 "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3[all …]
1 Socionext UniPhier Regulator Controller4 on Socionext UniPhier SoCs.7 ---------------9 This regulator controls VBUS and belongs to USB3 glue layer. Before using14 - compatible: Should be15 "socionext,uniphier-pro4-usb3-regulator" - for Pro4 SoC16 "socionext,uniphier-pro5-usb3-regulator" - for Pro5 SoC17 "socionext,uniphier-pxs2-usb3-regulator" - for PXs2 SoC18 "socionext,uniphier-ld20-usb3-regulator" - for LD20 SoC19 "socionext,uniphier-pxs3-usb3-regulator" - for PXs3 SoC[all …]
2 * Device Tree Source for UniPhier LD20 SoC4 * Copyright (C) 2015-2016 Socionext Inc.7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)13 compatible = "socionext,uniphier-ld20";14 #address-cells = <2>;15 #size-cells = <2>;16 interrupt-parent = <&gic>;19 #address-cells = <2>;20 #size-cells = <0>;22 cpu-map {[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3hs-phy.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Socionext UniPhier USB3 High-Speed (HS) PHY11 USB3 controller implemented on Socionext UniPhier SoCs.12 Although the controller includes High-Speed PHY and Super-Speed PHY,13 this describes about High-Speed PHY.16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>21 - socionext,uniphier-pro5-usb3-hsphy[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Socionext UniPhier USB3 Super-Speed (SS) PHY11 USB3 controller implemented on Socionext UniPhier SoCs.12 Although the controller includes High-Speed PHY and Super-Speed PHY,13 this describes about Super-Speed PHY.16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>21 - socionext,uniphier-pro4-usb3-ssphy[all …]
2 * UniPhier Specific Glue Layer for DWC34 * Copyright (C) 2016-2017 Socionext Inc.7 * SPDX-License-Identifier: GPL-2.0+75 return -EINVAL; in uniphier_dwc3_probe()79 return -ENOMEM; in uniphier_dwc3_probe()84 dev_err(dev, "failed to init glue layer\n"); in uniphier_dwc3_probe()93 .compatible = "socionext,uniphier-pro4-dwc3",97 .compatible = "socionext,uniphier-pro5-dwc3",101 .compatible = "socionext,uniphier-pxs2-dwc3",105 .compatible = "socionext,uniphier-ld20-dwc3",[all …]
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT3 // Device Tree Source for UniPhier LD20 SoC5 // Copyright (C) 2015-2016 Socionext Inc.8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/gpio/uniphier-gpio.h>10 #include <dt-bindings/thermal/thermal.h>13 compatible = "socionext,uniphier-ld20";14 #address-cells = <2>;15 #size-cells = <2>;16 interrupt-parent = <&gic>;[all …]
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