Searched +full:meson +full:- +full:g12a +full:- +full:usb +full:- +full:ctrl (Results 1 – 9 of 9) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)4 ---5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"8 title: Amlogic Meson G12A DWC3 USB SoC Controller Glue11 - Neil Armstrong <narmstrong@baylibre.com>14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB315 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.25 The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in[all …]
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)4 ---5 $id: "http://devicetree.org/schemas/phy/amlogic,meson-g12a-usb2-phy.yaml#"6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"8 title: Amlogic G12A USB2 PHY11 - Neil Armstrong <narmstrong@baylibre.com>16 - amlogic,meson-g12a-usb2-phy17 - amlogic,meson-a1-usb2-phy25 clock-names:27 - const: xtal[all …]
1 // SPDX-License-Identifier: GPL-2.03 * USB Glue for Amlogic G12A SoCs10 * The USB is organized with a glue around the DWC3 Controller IP as :11 * - Control registers for each USB2 Ports12 * - Control registers for the USB PHY layer13 * - SuperSpeed PHY can be enabled only if port is used14 * - Dynamic OTG switching with ID change interrupt29 #include <linux/usb/otg.h>30 #include <linux/usb/role.h>33 /* USB2 Ports Control Registers, offsets are per-port */[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/phy/phy.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/clock/g12a-clkc.h>9 #include <dt-bindings/clock/g12a-aoclkc.h>10 #include <dt-bindings/interrupt-controller/irq.h>11 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>13 #include <dt-bindings/thermal/thermal.h>16 interrupt-parent = <&gic>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)7 #include "meson-gx.dtsi"8 #include <dt-bindings/clock/gxbb-clkc.h>9 #include <dt-bindings/clock/gxbb-aoclkc.h>10 #include <dt-bindings/gpio/meson-gxl-gpio.h>11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>14 compatible = "amlogic,meson-gxl";17 usb: usb@d0078080 { label18 compatible = "amlogic,meson-gxl-usb-ctrl";21 #address-cells = <2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/axg-aoclkc.h>7 #include <dt-bindings/clock/axg-audio-clkc.h>8 #include <dt-bindings/clock/axg-clkc.h>9 #include <dt-bindings/gpio/gpio.h>10 #include <dt-bindings/gpio/meson-axg-gpio.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Amlogic G12A DWC3 Glue layer10 #include <asm-generic/io.h>12 #include <dm/device-internal.h>14 #include <dwc3-uboot.h>15 #include <generic-phy.h>16 #include <linux/usb/ch9.h>17 #include <linux/usb/gadget.h>20 #include <usb.h>48 /* USB Glue Control Registers */[all …]
... -boot-2021.07/.readthedocs.yml u-boot-2021.07/Kbuild u-boot-2021.07 ...
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]