Searched +full:imx7ulp +full:- +full:tpm (Results 1 – 7 of 7) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/timer/nxp,tpm-timer.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: NXP Low Power Timer/Pulse Width Modulation Module (TPM)10 - Dong Aisheng <aisheng.dong@nxp.com>13 The Timer/PWM Module (TPM) supports input capture, output compare,17 power modes. TPM can support global counter bus where one TPM drives22 const: fsl,imx7ulp-tpm32 - description: SoC TPM ipg clock[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/pwm/imx-tpm-pwm.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Freescale i.MX TPM PWM controller10 - Anson Huang <anson.huang@nxp.com>13 The TPM counter and period counter are shared between multiple17 "#pwm-cells":22 - fsl,imx7ulp-pwm27 assigned-clocks:[all …]
1 // SPDX-License-Identifier: GPL-2.0+13 #include "timer-of.h"99 return (int)(next - now) <= 0 ? -ETIME : 0; in tpm_set_next_event()122 evt->event_handler(evt); in tpm_timer_interrupt()130 .name = "i.MX7ULP TPM Timer",159 "imx-tpm", in tpm_clocksource_init()171 GENMASK(counter_width - 1, in tpm_clockevent_init()182 pr_err("tpm: failed to get ipg clk\n"); in tpm_timer_init()183 return -ENODEV; in tpm_timer_init()188 pr_err("tpm: ipg clock enable failed (%d)\n", ret); in tpm_timer_init()[all …]
1 // SPDX-License-Identifier: GPL-2.0+4 * Copyright 2017-2018 NXP8 #include <dt-bindings/clock/imx7ulp-clock.h>9 #include <dt-bindings/gpio/gpio.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include "imx7ulp-pinfunc.h"15 interrupt-parent = <&intc>;17 #address-cells = <1>;18 #size-cells = <1>;37 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Copyright 2018-2019 NXP.6 * - The TPM counter and period counter are shared between9 * - Changes to polarity cannot be latched at the time of the11 * - Changing period and duty cycle together isn't atomic,49 * together as a 2-bit field here.57 #define PWM_IMX_TPM_MOD_MOD GENMASK(PWM_IMX_TPM_MOD_WIDTH - 1, 0)92 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip); in pwm_imx_tpm_round_state() local96 rate = clk_get_rate(tpm->clk); in pwm_imx_tpm_round_state()97 tmp = (u64)state->period * rate; in pwm_imx_tpm_round_state()[all …]
2 * Copyright 2015-2016 Freescale Semiconductor, Inc.9 #include <dt-bindings/clock/imx7ulp-clock.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/gpio/gpio.h>13 #include "imx7ulp-pinfunc.h"16 interrupt-parent = <&intc>;37 #address-cells = <1>;38 #size-cells = <0>;41 compatible = "arm,cortex-a7";47 reserved-memory {[all …]
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