Searched +full:enet +full:- +full:phy +full:- +full:lane +full:- +full:swap (Results 1 – 11 of 11) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Ethernet PHY Generic Binding10 - Andrew Lunn <andrew@lunn.ch>11 - Florian Fainelli <f.fainelli@gmail.com>12 - Heiner Kallweit <hkallweit1@gmail.com>14 # The dt-schema tools will generate a select statement first by using21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"[all …]
33 /dts-v1/;35 #include "bcm958742-base.dtsi"43 enet-phy-lane-swap;47 mmc-ddr-1_8v;
4 * Copyright(c) 2016-2017 Broadcom. All rights reserved.33 /dts-v1/;35 #include "bcm958742-base.dtsi"43 enet-phy-lane-swap;47 mmc-ddr-1_8v;59 pinctrl-0 = <&spi0_pins>;60 pinctrl-names = "default";61 cs-gpios = <&gpio_hsls 34 0>;64 spi-flash@0 {65 compatible = "jedec,spi-nor";[all …]
33 /dts-v1/;39 compatible = "brcm,ns2-svk", "brcm,ns2";49 stdout-path = "serial0:115200n8";59 &enet {113 spi-max-frequency = <5000000>;114 spi-cpha;115 spi-cpol;118 pl022,slave-tx-disable = <0>;119 pl022,com-mode = <0>;120 pl022,rx-level-trig = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.02 /* Driver for the Texas Instruments DP83867 PHY12 #include <linux/phy.h>18 #include <dt-bindings/net/ti-dp83867.h>98 /* PHY CTRL bits */123 /* PHY STS bits */184 struct net_device *ndev = phydev->attached_dev; in dp83867_set_wol()191 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST | in dp83867_set_wol()196 if (wol->wolopts & WAKE_MAGIC) { in dp83867_set_wol()197 mac = (u8 *)ndev->dev_addr; in dp83867_set_wol()[all …]
1 // SPDX-License-Identifier: GPL-2.02 /* Driver for the Texas Instruments DP83869 PHY12 #include <linux/phy.h>16 #include <dt-bindings/net/ti-dp83869.h>69 /* This is the same bit mask as the BMCR so re-use the BMCR default */157 struct dp83869_private *dp83869 = phydev->priv; in dp83869_read_status()164 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) { in dp83869_read_status()165 if (phydev->link) { in dp83869_read_status()166 if (dp83869->mode == DP83869_RGMII_100_BASE) in dp83869_read_status()167 phydev->speed = SPEED_100; in dp83869_read_status()[all …]
1 // SPDX-License-Identifier: GPL-2.0+3 * drivers/net/phy/broadcom.c13 #include "bcm-phy-lib.h"16 #include <linux/phy.h>21 ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)24 ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))26 MODULE_DESCRIPTION("Broadcom PHY driver");34 /* handling PHY's internal RX clock delay */ in bcm54xx_config_clock_delay()37 if (phydev->interface == PHY_INTERFACE_MODE_RGMII || in bcm54xx_config_clock_delay()38 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { in bcm54xx_config_clock_delay()[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 * Device tree file for Phytec phyCORE-RK3288 SoM8 #include <dt-bindings/net/ti-dp83867.h>13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";29 ext_gmac: external-gmac-clock {30 compatible = "fixed-clock";31 #clock-cells = <0>;32 clock-frequency = <125000000>;33 clock-output-names = "ext_gmac";36 leds: user-leds {[all …]
2 * Device tree file for Phytec phyCORE-RK3288 SoM6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/net/ti-dp83867.h>47 #include "rk3288-u-boot.dtsi"51 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";68 ext_gmac: external-gmac-clock {69 compatible = "fixed-clock";70 #clock-cells = <0>;71 clock-frequency = <125000000>;72 clock-output-names = "ext_gmac";[all …]
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