Searched +full:am654 +full:- +full:ehrpwm +full:- +full:tbclk (Results 1 – 4 of 4) sorted by relevance
| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/ |
| H A D | pwm-tiehrpwm.txt | 1 TI SOC EHRPWM based PWM controller 4 - compatible: Must be "ti,<soc>-ehrpwm". 5 for am33xx - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; 6 for am4372 - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm"; 7 for am654 - compatible = "ti,am654-ehrpwm", "ti-am3352-ehrpwm"; 8 for da850 - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm"; 9 for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm"; 10 - #pwm-cells: should be 3. See pwm.yaml in this directory for a description of 13 - reg: physical base address and size of the registers map. 16 - clocks: Handle to the PWM's time-base and functional clock. [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | ti,am654-ehrpwm-tbclk.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/ti,am654-ehrpwm-tbclk.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI EHRPWM Time Base Clock 10 - Vignesh Raghavendra <vigneshr@ti.com> 15 - const: ti,am654-ehrpwm-tbclk 16 - const: syscon 18 "#clock-cells": 25 - compatible [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/ |
| H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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| /OK3568_Linux_fs/kernel/drivers/clk/keystone/ |
| H A D | syscon-clk.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <linux/clk-provider.h> 35 return regmap_write_bits(priv->regmap, priv->reg, priv->idx, in ti_syscon_gate_clk_enable() 36 priv->idx); in ti_syscon_gate_clk_enable() 43 regmap_write_bits(priv->regmap, priv->reg, priv->idx, 0); in ti_syscon_gate_clk_disable() 51 regmap_read(priv->regmap, priv->reg, &val); in ti_syscon_gate_clk_is_enabled() 53 return !!(val & priv->idx); in ti_syscon_gate_clk_is_enabled() 72 return ERR_PTR(-ENOMEM); in ti_syscon_gate_clk_register() 74 init.name = data->name; in ti_syscon_gate_clk_register() [all …]
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