Searched +full:fu540 +full:- +full:c000 +full:- +full:v1 (Results 1 – 9 of 9) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: SiFive Unleashed Rev C000 Platform DMA10 - Green Wan <green.wan@sifive.com>11 - Palmer Debbelt <palmer@sifive.com>12 - Paul Walmsley <paul.walmsley@sifive.com>23 https://static.dev.sifive.com/FU540-C000-v1.0.pdf28 - const: sifive,fu540-c000-pdma[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)2 /* Copyright (c) 2018-2019 SiFive, Inc */4 /dts-v1/;6 #include <dt-bindings/clock/sifive-fu540-prci.h>9 #address-cells = <2>;10 #size-cells = <2>;11 compatible = "sifive,fu540-c000", "sifive,fu540";23 #address-cells = <1>;24 #size-cells = <0>;28 i-cache-block-size = <64>;[all …]
1 /* SPDX-License-Identifier: GPL-2.0-or-later */3 * SiFive FU540 Platform DMA driver7 * - drivers/dma/fsl-edma.c8 * - drivers/dma/dw-edma/9 * - drivers/dma/pxa-dma.c12 * - Chapter 12 "Platform DMA Engine (PDMA)" of13 * SiFive FU540-C000 v1.014 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf20 #include <linux/dma-direction.h>23 #include "../virt-dma.h"[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * SiFive FU540 Platform DMA driver7 * - drivers/dma/fsl-edma.c8 * - drivers/dma/dw-edma/9 * - drivers/dma/pxa-dma.c12 * - Chapter 12 "Platform DMA Engine (PDMA)" of13 * SiFive FU540-C000 v1.014 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf21 #include <linux/dma-mapping.h>25 #include "sf-pdma.h"[all …]
1 DT compatible string versioning for SiFive open-source IP blocks4 strings for open-source SiFive IP blocks. HDL for these IP blocks7 https://github.com/sifive/sifive-blocks9 IP block-specific DT compatible strings are contained within the HDL,10 in the form "sifive,<ip-block-name><integer version number>".14 https://github.com/sifive/sifive-blocks/blob/v1.0/src/main/scala/devices/uart/UART.scala#L4317 auto-discovery, the maintainers of these IP blocks intend to increment25 upstream sifive-blocks commits. It is expected that most drivers will26 match on these IP block-specific compatible strings.29 continue to specify an SoC-specific compatible string value, such as[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Copyright (C) 2018-2019 SiFive, Inc.16 * pre-determined set of performance points.19 * - Analog Bits "Wide Range PLL Datasheet", version 2015.10.0120 * - SiFive FU540-C000 Manual v1p0, Chapter 7 "Clocking and Reset"21 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf28 #include <linux/clk/analogbits-wrpll-cln28hpc.h>36 /* MIN_POST_DIVIDE_REF_FREQ: minimum post-divider reference frequency, in Hz */39 /* MAX_POST_DIVIDE_REF_FREQ: maximum post-divider reference frequency, in Hz */68 * __wrpll_calc_filter_range() - determine PLL loop filter bandwidth[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Copyright (C) 2017-2018 SiFive5 * Reference Manual : https://static.dev.sifive.com/FU540-C000-v1.0.pdf8 * - When changing both duty cycle and period, we cannot prevent in11 * - The hardware cannot generate a 100% duty cycle.12 * - The hardware generates only inverted output.63 mutex_lock(&ddata->lock); in pwm_sifive_request()64 ddata->user_count++; in pwm_sifive_request()65 mutex_unlock(&ddata->lock); in pwm_sifive_request()74 mutex_lock(&ddata->lock); in pwm_sifive_free()[all …]
... -boot-2021.07/.readthedocs.yml u-boot-2021.07/Kbuild u-boot-2021.07 ...
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]