Lines Matching +full:fu540 +full:- +full:c000 +full:- +full:v1
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017-2018 SiFive
5 * Reference Manual : https://static.dev.sifive.com/FU540-C000-v1.0.pdf
8 * - When changing both duty cycle and period, we cannot prevent in
11 * - The hardware cannot generate a 100% duty cycle.
12 * - The hardware generates only inverted output.
63 mutex_lock(&ddata->lock); in pwm_sifive_request()
64 ddata->user_count++; in pwm_sifive_request()
65 mutex_unlock(&ddata->lock); in pwm_sifive_request()
74 mutex_lock(&ddata->lock); in pwm_sifive_free()
75 ddata->user_count--; in pwm_sifive_free()
76 mutex_unlock(&ddata->lock); in pwm_sifive_free()
93 scale_pow = div64_ul(ddata->approx_period * (u64)rate, NSEC_PER_SEC); in pwm_sifive_update_clock()
94 scale = clamp(ilog2(scale_pow) - PWM_SIFIVE_CMPWIDTH, 0, 0xf); in pwm_sifive_update_clock()
98 writel(val, ddata->regs + PWM_SIFIVE_PWMCFG); in pwm_sifive_update_clock()
102 ddata->real_period = div64_ul(num, rate); in pwm_sifive_update_clock()
103 dev_dbg(ddata->chip.dev, in pwm_sifive_update_clock()
104 "New real_period = %u ns\n", ddata->real_period); in pwm_sifive_update_clock()
113 duty = readl(ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm)); in pwm_sifive_get_state()
115 state->enabled = duty > 0; in pwm_sifive_get_state()
117 val = readl(ddata->regs + PWM_SIFIVE_PWMCFG); in pwm_sifive_get_state()
119 state->enabled = false; in pwm_sifive_get_state()
121 state->period = ddata->real_period; in pwm_sifive_get_state()
122 state->duty_cycle = in pwm_sifive_get_state()
123 (u64)duty * ddata->real_period >> PWM_SIFIVE_CMPWIDTH; in pwm_sifive_get_state()
124 state->polarity = PWM_POLARITY_INVERSED; in pwm_sifive_get_state()
133 ret = clk_enable(ddata->clk); in pwm_sifive_enable()
135 dev_err(ddata->chip.dev, "Enable clk failed\n"); in pwm_sifive_enable()
141 clk_disable(ddata->clk); in pwm_sifive_enable()
157 if (state->polarity != PWM_POLARITY_INVERSED) in pwm_sifive_apply()
158 return -EINVAL; in pwm_sifive_apply()
160 ret = clk_enable(ddata->clk); in pwm_sifive_apply()
162 dev_err(ddata->chip.dev, "Enable clk failed\n"); in pwm_sifive_apply()
166 mutex_lock(&ddata->lock); in pwm_sifive_apply()
167 cur_state = pwm->state; in pwm_sifive_apply()
170 duty_cycle = state->duty_cycle; in pwm_sifive_apply()
171 if (!state->enabled) in pwm_sifive_apply()
181 frac = DIV64_U64_ROUND_CLOSEST(num, state->period); in pwm_sifive_apply()
183 frac = min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1); in pwm_sifive_apply()
185 if (state->period != ddata->approx_period) { in pwm_sifive_apply()
186 if (ddata->user_count != 1) { in pwm_sifive_apply()
187 ret = -EBUSY; in pwm_sifive_apply()
190 ddata->approx_period = state->period; in pwm_sifive_apply()
191 pwm_sifive_update_clock(ddata, clk_get_rate(ddata->clk)); in pwm_sifive_apply()
194 writel(frac, ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm)); in pwm_sifive_apply()
196 if (state->enabled != enabled) in pwm_sifive_apply()
197 pwm_sifive_enable(chip, state->enabled); in pwm_sifive_apply()
200 clk_disable(ddata->clk); in pwm_sifive_apply()
201 mutex_unlock(&ddata->lock); in pwm_sifive_apply()
221 pwm_sifive_update_clock(ddata, ndata->new_rate); in pwm_sifive_clock_notifier()
228 struct device *dev = &pdev->dev; in pwm_sifive_probe()
238 return -ENOMEM; in pwm_sifive_probe()
240 mutex_init(&ddata->lock); in pwm_sifive_probe()
241 chip = &ddata->chip; in pwm_sifive_probe()
242 chip->dev = dev; in pwm_sifive_probe()
243 chip->ops = &pwm_sifive_ops; in pwm_sifive_probe()
244 chip->of_xlate = of_pwm_xlate_with_flags; in pwm_sifive_probe()
245 chip->of_pwm_n_cells = 3; in pwm_sifive_probe()
246 chip->base = -1; in pwm_sifive_probe()
247 chip->npwm = 4; in pwm_sifive_probe()
250 ddata->regs = devm_ioremap_resource(dev, res); in pwm_sifive_probe()
251 if (IS_ERR(ddata->regs)) in pwm_sifive_probe()
252 return PTR_ERR(ddata->regs); in pwm_sifive_probe()
254 ddata->clk = devm_clk_get(dev, NULL); in pwm_sifive_probe()
255 if (IS_ERR(ddata->clk)) in pwm_sifive_probe()
256 return dev_err_probe(dev, PTR_ERR(ddata->clk), in pwm_sifive_probe()
259 ret = clk_prepare_enable(ddata->clk); in pwm_sifive_probe()
265 val = readl(ddata->regs + PWM_SIFIVE_PWMCFG); in pwm_sifive_probe()
269 for (i = 0; i < chip->npwm; ++i) { in pwm_sifive_probe()
270 val = readl(ddata->regs + PWM_SIFIVE_PWMCMP(i)); in pwm_sifive_probe()
280 ret = clk_enable(ddata->clk); in pwm_sifive_probe()
288 clk_disable(ddata->clk); in pwm_sifive_probe()
293 ddata->notifier.notifier_call = pwm_sifive_clock_notifier; in pwm_sifive_probe()
294 ret = clk_notifier_register(ddata->clk, &ddata->notifier); in pwm_sifive_probe()
307 dev_dbg(dev, "SiFive PWM chip registered %d PWMs\n", chip->npwm); in pwm_sifive_probe()
312 clk_notifier_unregister(ddata->clk, &ddata->notifier); in pwm_sifive_probe()
315 clk_disable(ddata->clk); in pwm_sifive_probe()
316 --enabled_clks; in pwm_sifive_probe()
318 clk_unprepare(ddata->clk); in pwm_sifive_probe()
329 pwmchip_remove(&ddata->chip); in pwm_sifive_remove()
330 clk_notifier_unregister(ddata->clk, &ddata->notifier); in pwm_sifive_remove()
332 for (ch = 0; ch < ddata->chip.npwm; ch++) { in pwm_sifive_remove()
333 pwm = &ddata->chip.pwms[ch]; in pwm_sifive_remove()
334 if (pwm->state.enabled) in pwm_sifive_remove()
335 clk_disable(ddata->clk); in pwm_sifive_remove()
338 clk_unprepare(ddata->clk); in pwm_sifive_remove()
353 .name = "pwm-sifive",