| /OK3568_Linux_fs/kernel/lib/ |
| H A D | test_xarray.c | 20 void xa_dump(const struct xarray *xa) { } in xa_dump() argument 23 #define XA_BUG_ON(xa, x) do { \ argument 27 xa_dump(xa); \ 32 } while (0) 40 static void *xa_store_index(struct xarray *xa, unsigned long index, gfp_t gfp) in xa_store_index() argument 42 return xa_store(xa, index, xa_mk_index(index), gfp); in xa_store_index() 45 static void xa_insert_index(struct xarray *xa, unsigned long index) in xa_insert_index() argument 47 XA_BUG_ON(xa, xa_insert(xa, index, xa_mk_index(index), in xa_insert_index() 48 GFP_KERNEL) != 0); in xa_insert_index() 51 static void xa_alloc_index(struct xarray *xa, unsigned long index, gfp_t gfp) in xa_alloc_index() argument [all …]
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| H A D | xarray.c | 18 * @xa is used to refer to the entire xarray. 31 static inline unsigned int xa_lock_type(const struct xarray *xa) in xa_lock_type() argument 33 return (__force unsigned int)xa->xa_flags & 3; in xa_lock_type() 56 static inline bool xa_track_free(const struct xarray *xa) in xa_track_free() argument 58 return xa->xa_flags & XA_FLAGS_TRACK_FREE; in xa_track_free() 61 static inline bool xa_zero_busy(const struct xarray *xa) in xa_zero_busy() argument 63 return xa->xa_flags & XA_FLAGS_ZERO_BUSY; in xa_zero_busy() 66 static inline void xa_mark_set(struct xarray *xa, xa_mark_t mark) in xa_mark_set() argument 68 if (!(xa->xa_flags & XA_FLAGS_MARK(mark))) in xa_mark_set() 69 xa->xa_flags |= XA_FLAGS_MARK(mark); in xa_mark_set() [all …]
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| /OK3568_Linux_fs/buildroot/dl/sox/git/src/ |
| H A D | xa.c | 1 /* libSoX xa.c Support for Maxis .XA file format 21 * "Maxis XA Audio File Format Description", dated 5-01-2002. */ 29 #define HNIBBLE(byte) (((byte) >> 4) & 0xf) 30 #define LNIBBLE(byte) ((byte) & 0xf) 32 /* .xa file header */ 34 char magic[4]; /* "XA\0\0", "XAI\0" (sound/speech), or "XAJ\0" (music) */ 38 uint16_t tag; /* 0x0001 - PCM data */ 54 /* Private data for .xa file */ 66 0, 240, 460, 392, 67 0, 0, -208, -220, [all …]
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| /OK3568_Linux_fs/kernel/include/linux/ |
| H A D | xarray.h | 34 * 0-62: Sibling entries 54 WARN_ON((long)v < 0); in xa_mk_value() 85 * @tag: Tag value (0, 1 or 3). 88 * of storing value entries. Three tags are available (0, 1 and 3). 134 * Internal entries are used for a number of purposes. Entries 0-255 are 135 * used for sibling entries (only 0-62 are used by the current code). 256 211 * the errno from the pointer value, or returns 0 if the pointer does not 215 * Return: A negative errno or 0. 222 return 0; in xa_err() 233 * * xa_limit_32b - [0 - UINT_MAX] [all …]
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| /OK3568_Linux_fs/kernel/net/core/ |
| H A D | xdp.c | 22 #define REG_STATE_NEW 0x0 23 #define REG_STATE_REGISTERED 0x1 24 #define REG_STATE_UNREGISTERED 0x2 25 #define REG_STATE_UNUSED 0x3 29 #define MEM_ID_MAX 0xFFFE 51 const struct xdp_mem_allocator *xa = ptr; in xdp_mem_id_cmp() local 54 return xa->mem.id != mem_id; in xdp_mem_id_cmp() 71 struct xdp_mem_allocator *xa; in __xdp_mem_allocator_rcu_free() local 73 xa = container_of(rcu, struct xdp_mem_allocator, rcu); in __xdp_mem_allocator_rcu_free() 76 ida_simple_remove(&mem_id_pool, xa->mem.id); in __xdp_mem_allocator_rcu_free() [all …]
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| /OK3568_Linux_fs/kernel/tools/testing/radix-tree/ |
| H A D | multiorder.c | 15 static int item_insert_order(struct xarray *xa, unsigned long index, in item_insert_order() argument 18 XA_STATE_ORDER(xas, xa, index, order); in item_insert_order() 28 return 0; in item_insert_order() 34 void multiorder_iteration(struct xarray *xa) in multiorder_iteration() argument 36 XA_STATE(xas, xa, 0); in multiorder_iteration() 41 int index[NUM_ENTRIES] = {0, 2, 4, 8, 16, 32, 34, 36, 64, 72, 128}; in multiorder_iteration() 42 int order[NUM_ENTRIES] = {1, 1, 2, 3, 4, 1, 0, 1, 3, 0, 7}; in multiorder_iteration() 46 for (i = 0; i < NUM_ENTRIES; i++) { in multiorder_iteration() 47 err = item_insert_order(xa, index[i], order[i]); in multiorder_iteration() 51 for (j = 0; j < 256; j++) { in multiorder_iteration() [all …]
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| /OK3568_Linux_fs/kernel/drivers/input/touchscreen/focaltech_touch_ft5436/include/firmware/ |
| H A D | fw_sample.h | 1 0x2, 0x20,0x7, 0x2, 0xb9,0xe2,0xeb,0xaa,0x8, 0x22,0x22,0x2, 0x0, 0x4a,0xb4,0x2, 2 0x4, 0xa9,0xb7,0xea,0x22,0x24,0xff,0xa9,0x97,0xea,0x22,0x2, 0x68,0x1c,0xb4,0x2, 3 0x4, 0xa9,0xb6,0xea,0x22,0x24,0xff,0xa9,0x96,0xea,0x22,0x2, 0x88,0x1c,0x7f,0x60, 4 0xa9,0xc2,0xea,0x74,0x1, 0x12,0x13,0xcb,0x7f,0x6, 0x12,0x5, 0xb4,0x7f,0x6, 0x2, 5 0x9, 0xa1,0x22,0x2, 0x88,0x38,0xe4,0x2, 0x2a,0x20,0x32,0x2, 0x0, 0x5a,0x12,0x10, 6 0xa2,0x2, 0x13,0xae,0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x32,0x2, 0x0, 0x76,0x1, 0x2, 7 0x4, 0x8, 0x10,0x20,0x40,0x80,0x2, 0x3c,0x93,0x32,0xff,0x2, 0x0, 0x69,0xb2,0x86, 8 0x22,0xff,0xff,0x2, 0x10,0x52,0xca,0x7b,0xca,0x6b,0xca,0x5b,0xca,0x4b,0xca,0x2b, 9 0xca,0x1b,0xca,0xb, 0xc0,0xd0,0xc0,0x83,0xc0,0x82,0xd2,0xf, 0x7e,0xf, 0x3b,0x10, 10 0x69,0x30,0x0, 0x4, 0x7a,0x73,0x3b,0x20,0x7e,0x73,0x3b,0x20,0xa, 0x37,0x5e,0x34, [all …]
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| /OK3568_Linux_fs/external/xserver/mi/ |
| H A D | miwideline.c | 74 #if 0 98 #define miSpansCarefulRop(rop) (((rop) & 0xc) == 0x8 || ((rop) & 0x3) == 0x2) 113 spanGroup->size = 0; in miInitSpanGroup() 114 spanGroup->count = 0; in miInitSpanGroup() 120 #define YMIN(spans) (spans->points[0].y) 144 extra = 0; in miSubtractSpans() 237 if (spansCount > 0) { in miAppendSpans() 246 ymin = spans->points[0].y; in miAppendSpans() 292 xprev = points[0].x; in QuickSortSpansX() 301 for (j = 0; x >= points[j].x; j++) { in QuickSortSpansX() [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/chelsio/cxgb/ |
| H A D | vsc7326_reg.h | 14 #define CRA(blk,sub,adr) ((((blk) & 0x7) << 13) | (((sub) & 0xf) << 9) | (((adr) & 0xff) << 1)) 17 #define REG_CHIP_ID CRA(0x7,0xf,0x00) /* Chip ID */ 18 #define REG_BLADE_ID CRA(0x7,0xf,0x01) /* Blade ID */ 19 #define REG_SW_RESET CRA(0x7,0xf,0x02) /* Global Soft Reset */ 20 #define REG_MEM_BIST CRA(0x7,0xf,0x04) /* mem */ 21 #define REG_IFACE_MODE CRA(0x7,0xf,0x07) /* Interface mode */ 22 #define REG_MSCH CRA(0x7,0x2,0x06) /* CRC error count */ 23 #define REG_CRC_CNT CRA(0x7,0x2,0x0a) /* CRC error count */ 24 #define REG_CRC_CFG CRA(0x7,0x2,0x0b) /* CRC config */ 25 #define REG_SI_TRANSFER_SEL CRA(0x7,0xf,0x18) /* SI Transfer Select */ [all …]
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| /OK3568_Linux_fs/kernel/drivers/infiniband/core/ |
| H A D | restrack.c | 21 * Return: 0 on success 34 for (i = 0; i < RDMA_RESTRACK_MAX; i++) in rdma_restrack_init() 35 xa_init_flags(&rt[i].xa, XA_FLAGS_ALLOC); in rdma_restrack_init() 37 return 0; in rdma_restrack_init() 68 for (i = 0 ; i < RDMA_RESTRACK_MAX; i++) { in rdma_restrack_clean() 69 struct xarray *xa = &dev->res[i].xa; in rdma_restrack_clean() local 71 if (!xa_empty(xa)) { in rdma_restrack_clean() 78 xa_for_each(xa, index, e) { in rdma_restrack_clean() 98 xa_destroy(xa); in rdma_restrack_clean() 115 XA_STATE(xas, &rt->xa, 0); in rdma_restrack_count() [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | imx7ulp-pinfunc.h | 15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0 16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0 17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x0244 0x4 0x1 18 #define IMX7ULP_PAD_PTC0__LPI2C4_SCL 0x0000 0x0278 0x5 0x1 19 #define IMX7ULP_PAD_PTC0__TPM4_CLKIN 0x0000 0x0298 0x6 0x1 20 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0 21 #define IMX7ULP_PAD_PTC1__PTC1 0x0004 0x0000 0x1 0x0 22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0 23 #define IMX7ULP_PAD_PTC1__LPUART4_RTS_B 0x0004 0x0000 0x4 0x0 24 #define IMX7ULP_PAD_PTC1__LPI2C4_SDA 0x0004 0x027c 0x5 0x1 [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_1_sh_mask.h | 26 …C_TAG_CNT__DED_COUNT__SHIFT 0x0 27 …C_TAG_CNT__SEC_COUNT__SHIFT 0x2 28 …T__DED_COUNT_MASK 0x00000003L 29 …T__SEC_COUNT_MASK 0x0000000CL 31 …C_ROQ_CNT__DED_COUNT_ME1__SHIFT 0x0 32 …C_ROQ_CNT__SEC_COUNT_ME1__SHIFT 0x2 33 …C_ROQ_CNT__DED_COUNT_ME2__SHIFT 0x4 34 …C_ROQ_CNT__SEC_COUNT_ME2__SHIFT 0x6 35 …T__DED_COUNT_ME1_MASK 0x00000003L 36 …T__SEC_COUNT_ME1_MASK 0x0000000CL [all …]
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| H A D | gc_9_0_sh_mask.h | 25 …DC_CNT__DRAMRD_CMDMEM_SEC_COUNT__SHIFT 0x0 26 …DC_CNT__DRAMRD_CMDMEM_DED_COUNT__SHIFT 0x2 27 …DC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT 0x4 28 …DC_CNT__DRAMWR_CMDMEM_DED_COUNT__SHIFT 0x6 29 …DC_CNT__DRAMWR_DATAMEM_SEC_COUNT__SHIFT 0x8 30 …DC_CNT__DRAMWR_DATAMEM_DED_COUNT__SHIFT 0xa 31 …DC_CNT__RRET_TAGMEM_SEC_COUNT__SHIFT 0xc 32 …DC_CNT__RRET_TAGMEM_DED_COUNT__SHIFT 0xe 33 …C_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT 0x10 34 …C_CNT__WRET_TAGMEM_DED_COUNT__SHIFT 0x12 [all …]
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| H A D | gc_10_1_0_sh_mask.h | 27 …DEC_START__START__SHIFT 0x0 28 …T__START_MASK 0xFFFFFFFFL 30 …PG_CNTL__CMD__SHIFT 0x0 31 …G_CNTL__STATUS__SHIFT 0x10 32 …_CMD_MASK 0x0000000FL 33 …_STATUS_MASK 0x000F0000L 35 …PG_CTX_LO__ADDR__SHIFT 0x0 36 …O__ADDR_MASK 0xFFFFFFFFL 38 …PG_CTX_HI__ADDR__SHIFT 0x0 39 …I__ADDR_MASK 0xFFFFFFFFL [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/bif/ |
| H A D | bif_4_1_sh_mask.h | 27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff 28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0 29 #define MM_INDEX__MM_APER_MASK 0x80000000 30 #define MM_INDEX__MM_APER__SHIFT 0x1f 31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff 32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0 33 #define MM_DATA__MM_DATA_MASK 0xffffffff 34 #define MM_DATA__MM_DATA__SHIFT 0x0 35 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2 36 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1 [all …]
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| H A D | bif_5_0_sh_mask.h | 27 #define MM_INDEX__MM_OFFSET_MASK 0x7fffffff 28 #define MM_INDEX__MM_OFFSET__SHIFT 0x0 29 #define MM_INDEX__MM_APER_MASK 0x80000000 30 #define MM_INDEX__MM_APER__SHIFT 0x1f 31 #define MM_INDEX_HI__MM_OFFSET_HI_MASK 0xffffffff 32 #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0 33 #define MM_DATA__MM_DATA_MASK 0xffffffff 34 #define MM_DATA__MM_DATA__SHIFT 0x0 35 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2 36 #define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1 [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | imx7ulp-pinfunc.h | 26 #define ULP1_PAD_PTA0_LLWU0_P0__CMP0_IN2A 0x0000 0x0000 0x0 0x0 27 #define ULP1_PAD_PTA0_LLWU0_P0__PTA0 0x0000 0x0000 0x1 0x0 28 #define ULP1_PAD_PTA0_LLWU0_P0__LLWU0_P0 0x0000 0x0000 0xd 0x0 29 #define ULP1_PAD_PTA0_LLWU0_P0__LPSPI0_PCS1 0x0000 0xd104 0x3 0x2 30 #define ULP1_PAD_PTA0_LLWU0_P0__LPUART0_CTS_B 0x0000 0xd1f8 0x4 0x2 31 #define ULP1_PAD_PTA0_LLWU0_P0__LPI2C0_SCL 0x0000 0xd17c 0x5 0x2 32 #define ULP1_PAD_PTA0_LLWU0_P0__TPM0_CLKIN 0x0000 0xd1a8 0x6 0x2 33 #define ULP1_PAD_PTA0_LLWU0_P0__I2S0_RX_BCLK 0x0000 0x01b8 0x7 0x2 34 #define ULP1_PAD_PTA1__CMP0_IN2B 0x0004 0x0000 0x0 0x0 35 #define ULP1_PAD_PTA1__PTA1 0x0004 0x0000 0x1 0x0 [all …]
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| /OK3568_Linux_fs/kernel/include/trace/events/ |
| H A D | xdp.h | 92 ((struct _bpf_dtab_netdev *)tgt)->dev->ifindex : 0) 120 __entry->map_id = map ? map->id : 0; 121 __entry->map_index = map ? index : 0; 149 trace_xdp_redirect(dev, xdp, NULL, 0, NULL, to); 155 trace_xdp_redirect(dev, xdp, to, 0, map, index); 305 __MEM_TYPE_MAP(__MEM_TYPE_SYM_FN) { -1, 0 } 310 TP_PROTO(const struct xdp_mem_allocator *xa), 312 TP_ARGS(xa), 315 __field(const struct xdp_mem_allocator *, xa) 322 __entry->xa = xa; [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_2_sh_mask.h | 27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff 28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0 29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff 30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0 31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff 32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0 33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff 34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0 35 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE_MASK 0x8 36 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE__SHIFT 0x3 [all …]
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| H A D | gfx_8_0_sh_mask.h | 27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff 28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0 29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff 30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0 31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff 32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0 33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff 34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0 35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1 36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0 [all …]
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| H A D | gfx_8_1_sh_mask.h | 27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff 28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0 29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff 30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0 31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff 32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0 33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff 34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0 35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1 36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0 [all …]
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| /OK3568_Linux_fs/kernel/drivers/media/i2c/jaguar1_drv/ |
| H A D | jaguar1_cableA_video_eq_table.h | 35 .eq_bypass = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }, 36 .eq_band_sel = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 37 .eq_gain_sel = { 0x78, 0x78, 0x78, 0x78, 0x78, 0x78 }, 38 .deq_a_on = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }, 39 .deq_a_sel = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }, 43 .deqA_01 = { 0xac, 0xac, 0xac, 0xac, 0xac, 0xac }, 44 .deqA_02 = { 0x78, 0x78, 0x78, 0x78, 0x78, 0x78 }, 45 .deqA_03 = { 0x17, 0x17, 0x17, 0x17, 0x17, 0x17 }, 46 .deqA_04 = { 0xc1, 0xc1, 0xc1, 0xc1, 0xc1, 0xc1 }, 47 .deqA_05 = { 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 }, [all …]
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| /OK3568_Linux_fs/kernel/crypto/ |
| H A D | dh.c | 19 MPI xa; /* Value is guaranteed to be set. */ member 27 mpi_free(ctx->xa); in dh_clear_ctx() 28 memset(ctx, 0, sizeof(*ctx)); in dh_clear_ctx() 33 * ya = g^xa mod p; [RFC2631 sec 2.1.1] 35 * ZZ = yb^xa mod p; [RFC2631 sec 2.1.1] 39 /* val = base^xa mod p */ in _compute_val() 40 return mpi_powm(val, base, ctx->xa, ctx->p); in _compute_val() 50 return (p_len < 1536) ? -EINVAL : 0; in dh_check_params_length() 72 return 0; in dh_set_params() 84 if (crypto_dh_decode_key(buf, len, ¶ms) < 0) in dh_set_secret() [all …]
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| /OK3568_Linux_fs/kernel/drivers/iommu/ |
| H A D | ioasid.c | 45 * @xa: xarray holds the IOASID space 52 #define IOASID_ALLOCATOR_CUSTOM BIT(0) /* Needs framework to track results */ 54 struct xarray xa; member 71 .flags = 0, 72 .xa = XARRAY_INIT(ioasid_xa, XA_FLAGS_ALLOC), 81 if (xa_alloc(&default_allocator.xa, &id, opaque, XA_LIMIT(min, max), GFP_ATOMIC)) { in default_alloc() 93 ioasid_data = xa_erase(&default_allocator.xa, ioasid); in default_free() 106 xa_init_flags(&ia_data->xa, XA_FLAGS_ALLOC); in ioasid_alloc_allocator() 128 * are managed by IOASID framework similar to data stored in xa by default 142 int ret = 0; in ioasid_register_allocator() [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| H A D | gmc_7_0_sh_mask.h | 27 #define MC_CONFIG__MCDW_WR_ENABLE_MASK 0x1 28 #define MC_CONFIG__MCDW_WR_ENABLE__SHIFT 0x0 29 #define MC_CONFIG__MCDX_WR_ENABLE_MASK 0x2 30 #define MC_CONFIG__MCDX_WR_ENABLE__SHIFT 0x1 31 #define MC_CONFIG__MCDY_WR_ENABLE_MASK 0x4 32 #define MC_CONFIG__MCDY_WR_ENABLE__SHIFT 0x2 33 #define MC_CONFIG__MCDZ_WR_ENABLE_MASK 0x8 34 #define MC_CONFIG__MCDZ_WR_ENABLE__SHIFT 0x3 35 #define MC_CONFIG__MC_RD_ENABLE_MASK 0x30 36 #define MC_CONFIG__MC_RD_ENABLE__SHIFT 0x4 [all …]
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