Home
last modified time | relevance | path

Searched +full:0 +full:- +full:3 (Results 1 – 25 of 1331) sorted by relevance

12345678910>>...54

/OK3568_Linux_fs/kernel/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x82 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
45 #define XCHAL_CP_ID_AUDIOENGINELX 1 /* coprocessor ID (0..7) */
48 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
50 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
53 #define XCHAL_CP0_SA_SIZE 0
55 #define XCHAL_CP2_SA_SIZE 0
[all …]
/OK3568_Linux_fs/kernel/tools/testing/selftests/kvm/aarch64/
H A Dget-reg-list.c1 // SPDX-License-Identifier: GPL-2.0
9 * list new registers with get-reg-list. We assume they'll be unused, at
13 * a regression in get-reg-list. This test checks for that regression by
17 * by running the test with the --list command line argument.
23 * from guests"). Also, one must use the --core-reg-fixup command line
43 for ((i) = 0; (i) < reg_list->n; ++(i))
47 if (!filter_reg(reg_list->reg[i]))
50 for ((i) = 0; (i) < blessed_n; ++(i)) \
51 if (!find_reg(reg_list->reg, reg_list->n, blessed_reg[i]))
55 if (!find_reg(blessed_reg, blessed_n, reg_list->reg[i]))
[all …]
/OK3568_Linux_fs/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dtie.h7 * Copyright (C) 1999-2015 Cadence Design Systems Inc.
9 * SPDX-License-Identifier: GPL-2.0+
15 #define XCHAL_CP_NUM 0 /* number of coprocessors */
16 #define XCHAL_CP_MAX 0 /* max CP ID + 1 (0 if none) */
17 #define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */
18 #define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */
20 /* Save area for non-coprocessor optional and custom (TIE) state: */
25 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
38 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
39 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
[all …]
/OK3568_Linux_fs/kernel/arch/xtensa/variants/csp/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x80 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
43 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
45 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
48 #define XCHAL_CP0_SA_SIZE 0
50 #define XCHAL_CP1_SA_SIZE 0
52 #define XCHAL_CP2_SA_SIZE 0
[all …]
/OK3568_Linux_fs/kernel/arch/xtensa/variants/de212/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
35 #define XCHAL_CP_NUM 0 /* number of coprocessors */
36 #define XCHAL_CP_MAX 0 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */
40 /* Save area for non-coprocessor optional and custom (TIE) state: */
45 #define XCHAL_TOTAL_SA_SIZE 32 /* with 16-byte align padding */
58 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
59 * kind = 0 (special reg), 1 (TIE user reg), or 2 (TIE regfile reg)
[all …]
/OK3568_Linux_fs/buildroot/dl/qt5location/git/src/positioning/
H A Dqdoublematrix4x4_p.h14 ** and conditions see https://www.qt.io/terms-conditions. For further
15 ** information use the contact form at https://www.qt.io/contact-us.
19 ** General Public License version 3 as published by the Free Software
22 ** ensure the GNU Lesser General Public License version 3 requirements
23 ** will be met: https://www.gnu.org/licenses/lgpl-3.0.html.
28 ** Public license version 3 or any later version approved by the KDE Free
33 ** be met: https://www.gnu.org/licenses/gpl-2.0.html and
34 ** https://www.gnu.org/licenses/gpl-3.0.html.
45 // -------------
96 inline QDoubleMatrix4x4& operator-=(const QDoubleMatrix4x4& other);
[all …]
H A Dqdoublematrix4x4.cpp14 ** and conditions see https://www.qt.io/terms-conditions. For further
15 ** information use the contact form at https://www.qt.io/contact-us.
19 ** General Public License version 3 as published by the Free Software
22 ** ensure the GNU Lesser General Public License version 3 requirements
23 ** will be met: https://www.gnu.org/licenses/lgpl-3.0.html.
28 ** Public license version 3 or any later version approved by the KDE Free
33 ** be met: https://www.gnu.org/licenses/gpl-2.0.html and
34 ** https://www.gnu.org/licenses/gpl-3.0.html.
52 for (int row = 0; row < 4; ++row) in QDoubleMatrix4x4()
53 for (int col = 0; col < 4; ++col) in QDoubleMatrix4x4()
[all …]
/OK3568_Linux_fs/kernel/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dtie.h2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2014 Tensilica Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
37 #define XCHAL_CP_MASK 0x82 /* bitmask of all CPs by ID */
38 #define XCHAL_CP_PORT_MASK 0x80 /* bitmask of only port CPs */
45 #define XCHAL_CP_ID_AUDIOENGINELX 1 /* coprocessor ID (0..7) */
48 #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */
50 #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */
53 #define XCHAL_CP0_SA_SIZE 0
55 #define XCHAL_CP2_SA_SIZE 0
[all …]
/OK3568_Linux_fs/u-boot/drivers/mtd/nand/raw/
H A Dnand_ids.c23 * If page size and eraseblock size are 0, the sizes are taken from the
28 LEGACY_ID_NAND("NAND 1MiB 5V 8-bit", 0x6e, 1, SZ_4K, SP_OPTIONS),
29 LEGACY_ID_NAND("NAND 2MiB 5V 8-bit", 0x64, 2, SZ_4K, SP_OPTIONS),
30 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xe8, 1, SZ_4K, SP_OPTIONS),
31 LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xec, 1, SZ_4K, SP_OPTIONS),
32 LEGACY_ID_NAND("NAND 2MiB 3,3V 8-bit", 0xea, 2, SZ_4K, SP_OPTIONS),
33 LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xd5, 4, SZ_8K, SP_OPTIONS),
35 LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xe6, 8, SZ_8K, SP_OPTIONS),
42 {"TC58NVG0S3E 1G 3.3V 8-bit",
43 { .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} },
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/vt6655/
H A Drf.c1 // SPDX-License-Identifier: GPL-2.0+
15 * IFRFbWriteEmbedded - Embedded write RF register via MAC
39 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
40 0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
41 0x01A00200 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
42 0x00FFF300 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
43 0x0005A400 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
44 0x0F4DC500 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
45 0x0805B600 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
46 0x0146C700 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
[all …]
/OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/
H A Dnand_ids.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #define LP_OPTIONS 0
20 * If page size and eraseblock size are 0, the sizes are taken from the
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
30 { .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} },
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
33 { .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} },
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/sandybridge/
H A Dpipeline.json5 "UMask": "0x3",
12 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
13 "Counter": "Fixed counter 0",
14 "UMask": "0x1",
18 "CounterHTOff": "Fixed counter 0"
23 "UMask": "0x2",
31 "UMask": "0x2",
39 "EventCode": "0x03",
40 "Counter": "0,1,2,3",
41 "UMask": "0x1",
[all …]
H A Dcache.json3 "EventCode": "0x24",
4 "Counter": "0,1,2,3",
5 "UMask": "0x1",
9 "CounterHTOff": "0,1,2,3,4,5,6,7"
12 "EventCode": "0x24",
13 "Counter": "0,1,2,3",
14 "UMask": "0x3",
18 "CounterHTOff": "0,1,2,3,4,5,6,7"
21 "EventCode": "0x24",
22 "Counter": "0,1,2,3",
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/broadwellx/
H A Dpipeline.json3 "UMask": "0x1",
5 "Counter": "Fixed counter 0",
7 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
9 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
39 "EventCode": "0x03",
40 "UMask": "0x2",
41 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/ivytown/
H A Dpipeline.json3 "Counter": "Fixed counter 0",
4 "UMask": "0x1",
8 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
38 "EventCode": "0x03",
39 "Counter": "0,1,2,3",
40 "UMask": "0x2",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/ivybridge/
H A Dpipeline.json3 "Counter": "Fixed counter 0",
4 "UMask": "0x1",
8 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
38 "EventCode": "0x03",
39 "Counter": "0,1,2,3",
40 "UMask": "0x2",
43 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dmdio-mux-gpio.txt8 - compatible : mdio-mux-gpio.
9 - gpios : GPIO specifiers for each GPIO line. One or more must be specified.
16 compatible = "cavium,octeon-3860-mdio";
17 #address-cells = <1>;
18 #size-cells = <0>;
19 reg = <0x11800 0x00001900 0x0 0x40>;
23 An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a
24 pair of GPIO lines. Child busses 2 and 3 populated with 4
27 mdio-mux {
28 compatible = "mdio-mux-gpio";
[all …]
H A Dmdio-mux.txt8 - #address-cells = <1>;
9 - #size-cells = <0>;
12 - mdio-parent-bus : phandle to the parent MDIO bus.
14 - Other properties specific to the multiplexer/switch hardware.
17 - #address-cells = <1>;
18 - #size-cells = <0>;
19 - reg : The sub-bus number.
26 compatible = "cavium,octeon-3860-mdio";
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/jaketown/
H A Dpipeline.json3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
5 "UMask": "0x1",
14 "UMask": "0x2",
22 "Counter": "Fixed counter 3",
23 "UMask": "0x3",
27 "CounterHTOff": "Fixed counter 3"
30 "EventCode": "0x88",
31 "Counter": "0,1,2,3",
32 "UMask": "0x41",
35 "BriefDescription": "Not taken macro-conditional branches.",
[all …]
/OK3568_Linux_fs/kernel/fs/exfat/
H A Dballoc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
14 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2,/* 0 ~ 19*/
15 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3,/* 20 ~ 39*/
16 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/* 40 ~ 59*/
17 0, 1, 0, 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4,/* 60 ~ 79*/
18 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2,/* 80 ~ 99*/
19 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3,/*100 ~ 119*/
20 0, 1, 0, 2, 0, 1, 0, 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/*120 ~ 139*/
21 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5,/*140 ~ 159*/
[all …]
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/cavium-octeon/
H A Docteon_68xx.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
7 * use. Because of this, it contains a super-set of the available
11 compatible = "cavium,octeon-6880";
12 #address-cells = <2>;
13 #size-cells = <2>;
14 interrupt-parent = <&ciu2>;
16 soc@0 {
17 compatible = "simple-bus";
18 #address-cells = <2>;
[all …]
/OK3568_Linux_fs/buildroot/dl/unixbench/git/UnixBench/testdir/
H A Dlarge.txt1 execve("/usr/bin/gimp", ["gimp"], [/* 99 vars */]) = 0
2 brk(0) = 0x8360000
3 mmap2(NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0xb7efc000
4 access("/etc/ld.so.preload", R_OK) = -1 ENOENT (No such file or directory)
5 open("/user/folk/clint/lib/tls/i686/sse2/libgimpwidgets-2.0.so.0", O_RDONLY) = -1 ENOENT (No such f…
6 stat64("/user/folk/clint/lib/tls/i686/sse2", 0xbfcdba08) = -1 ENOENT (No such file or directory)
7 open("/user/folk/clint/lib/tls/i686/libgimpwidgets-2.0.so.0", O_RDONLY) = -1 ENOENT (No such file o…
8 stat64("/user/folk/clint/lib/tls/i686", 0xbfcdba08) = -1 ENOENT (No such file or directory)
9 open("/user/folk/clint/lib/tls/sse2/libgimpwidgets-2.0.so.0", O_RDONLY) = -1 ENOENT (No such file o…
10 stat64("/user/folk/clint/lib/tls/sse2", 0xbfcdba08) = -1 ENOENT (No such file or directory)
[all …]
/OK3568_Linux_fs/buildroot/package/speex/
H A D0001-thumb2-support.patch4 http://lists.xiph.org/pipermail/speex-dev/2010-November/008041.html.
6 Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 [Bernd: rebased for 1.2.0]
8 Signed-off-by: Bernd Kuhls <bernd.kuhls@t-online.de>
10 diff --git a/libspeex/filters_arm4.h b/libspeex/filters_arm4.h
12 --- a/libspeex/filters_arm4.h
14 @@ -47,8 +47,10 @@ int normalize16(const spx_sig_t *x, spx_word16_t *y, spx_sig_t max_scale, int le
16 "\tldr %4, [%0], #4 \n"
20 "\tcmp %4, %3 \n"
22 "\tmovlt %3, %4 \n"
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/broadwellde/
H A Dpipeline.json3 "UMask": "0x1",
5 "Counter": "Fixed counter 0",
7 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
9 "CounterHTOff": "Fixed counter 0"
12 "UMask": "0x2",
21 "UMask": "0x2",
30 "UMask": "0x3",
39 "EventCode": "0x03",
40 "UMask": "0x2",
41 …"BriefDescription": "Cases when loads get true Block-on-Store blocking code preventing store forwa…
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/broadwell/
H A Dpipeline.json3 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last…
4 "Counter": "Fixed counter 0",
5 "UMask": "0x1",
9 "CounterHTOff": "Fixed counter 0"
14 "UMask": "0x2",
22 "UMask": "0x2",
32 "UMask": "0x3",
39 …-on-Store blocking code preventing store forwarding. This includes cases when:\n - preceding store…
40 "EventCode": "0x03",
41 "Counter": "0,1,2,3",
[all …]

12345678910>>...54