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/rk3399_rockchip-uboot/tools/kermit/
H A Dflash_param9 set carrier-watch off
11 #set flow-control none
12 set flow-control xon/xoff
46 #out setenv bootargs root=/dev/ram ramdisk_size=8192 init=/sbin/init ip=\%1:192.168.1.100:192.168.1…
47 #out setenv bootargs root=/dev/ram ramdisk_size=8192 init=/sbin/init ip=\%1:192.168.0.1\13
48 #out setenv bootargs root=/dev/ram ramdisk_size=8192 init=/sbin/init ip=\%1\13
/rk3399_rockchip-uboot/board/xilinx/zynq/
H A DMakefile2 # (C) Copyright 2000-2006
5 # SPDX-License-Identifier: GPL-2.0+
8 obj-y := board.o
10 hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))
12 init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/ps7_init_gpl.c),\
13 $(hw-platform-y)/ps7_init_gpl.o)
15 ifeq ($(init-objs),)
17 init-objs := ps7_init_gpl.o
23 obj-$(CONFIG_SPL_BUILD) += $(init-objs)
26 CFLAGS_REMOVE_ps7_init_gpl.o := -Wstrict-prototypes
[all …]
/rk3399_rockchip-uboot/doc/device-tree-bindings/misc/
H A Dintel,baytrail-fsp.txt7 All properties can be found within the `upd-region` struct in
8 arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h, under the same names, and in
14 - fsp,enable-sdio
15 - fsp,enable-sdcard
16 - fsp,enable-hsuart0
17 - fsp,enable-hsuart1
18 - fsp,enable-spi
19 - fsp,enable-sata
20 - fsp,enable-azalia
21 - fsp,enable-xhci
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra124/
H A Ddisplay.h5 * SPDX-License-Identifier: GPL-2.0+
14 * The frame buffer can be positioned by U-Boot or overridden by the fdt.
15 * You should pass in the U-Boot address here, and check the contents of
20 * @return 0 if ok, -1 on error (unsupported bits per pixel)
33 * Perform the next stage of the LCD init if it is time to do so.
35 * LCD init can be time-consuming because of the number of delays we need
37 * be called at various times during U-Boot operation to advance the
42 * The final call should have wait=1 to complete the init.
45 * @param wait 1 to wait until all init is complete, and then return
47 * not yet time for the next init.
/rk3399_rockchip-uboot/board/xilinx/zynqmp/
H A DMakefile2 # (C) Copyright 2014 - 2016 Xilinx, Inc.
5 # SPDX-License-Identifier: GPL-2.0+
8 obj-y := zynqmp.o
10 hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))
12 init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/psu_init_gpl.c),\
13 $(hw-platform-y)/psu_init_gpl.o)
15 ifeq ($(init-objs),)
17 init-objs := psu_init_gpl.o
23 ifdef_any_of = $(filter-out undefined,$(foreach v,$(1),$(origin $(v))))
26 obj-y += $(init-objs)
[all …]
/rk3399_rockchip-uboot/drivers/usb/dwc3/
H A Ddwc3-uniphier.c4 * Copyright (C) 2016-2017 Socionext Inc.
7 * SPDX-License-Identifier: GPL-2.0+
70 int (*init)(void __iomem *regs); in uniphier_dwc3_probe() local
75 return -EINVAL; in uniphier_dwc3_probe()
79 return -ENOMEM; in uniphier_dwc3_probe()
81 init = (typeof(init))dev_get_driver_data(dev); in uniphier_dwc3_probe()
82 ret = init(regs); in uniphier_dwc3_probe()
84 dev_err(dev, "failed to init glue layer\n"); in uniphier_dwc3_probe()
93 .compatible = "socionext,uniphier-pro4-dwc3",
97 .compatible = "socionext,uniphier-pro5-dwc3",
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-omap2/am33xx/
H A Dti816x_emif4.c8 * SPDX-License-Identifier: GPL-2.0+
21 * Init DDR3 on TI816X EVM
38 writel(0x1, DDRPHY_CONFIG_BASE + 0x0F8); /* init mode */ in ddr_init_settings()
49 * value is a ratio - so 0x100 represents one cycle. The real delay in ddr_init_settings()
57 writel((0x20 << 10) | 0x20, DDRPHY_CONFIG_BASE + 0x0F0); /* data0 writelvl init ratio */ in ddr_init_settings()
59 writel((0x20 << 10) | 0x20, DDRPHY_CONFIG_BASE + 0x194); /* data1 writelvl init ratio */ in ddr_init_settings()
61 writel((0x20 << 10) | 0x20, DDRPHY_CONFIG_BASE + 0x238); /* data2 writelvl init ratio */ in ddr_init_settings()
63 writel((0x20 << 10) | 0x20, DDRPHY_CONFIG_BASE + 0x2dc); /* data3 writelvl init ratio */ in ddr_init_settings()
67 writel((0x20 << 10) | 0x20, DDRPHY_CONFIG_BASE + 0x0FC); /* data0 gatelvl init ratio */ in ddr_init_settings()
69 writel((0x20 << 10) | 0x20, DDRPHY_CONFIG_BASE + 0x1A0); /* data1 gatelvl init ratio */ in ddr_init_settings()
[all …]
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc83xx/
H A Du-boot.lds2 * (C) Copyright 2006-2010
5 * SPDX-License-Identifier: GPL-2.0+
11 /* Read-only sections, merged into text segment: */
20 /* Read-write section, merged into data segment: */
32 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
33 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
58 .text.init : { *(.text.init) }
59 .data.init : { *(.data.init) }
/rk3399_rockchip-uboot/board/renesas/ap325rxa/
H A Dap325rxa.c5 * SPDX-License-Identifier: GPL-2.0+
54 /* I/O Buffer Hi-Z data */
78 /* Pin Function Controler Init */ in board_init()
84 /* I/O Buffer Hi-Z Init */ in board_init()
90 /* Module select reg Init */ in board_init()
94 /* Module Stop reg Init */ in board_init()
122 /* PRI control register Init */ in board_init()
125 /* cpld init */ in board_init()
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc86xx/
H A Du-boot.lds4 * SPDX-License-Identifier: GPL-2.0+
12 /* Read-only sections, merged into text segment: */
26 /* Read-write section, merged into data segment: */
38 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
39 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
63 .text.init : { *(.text.init) }
64 .data.init : { *(.data.init) }
/rk3399_rockchip-uboot/drivers/fpga/
H A Dspartan2.c5 * SPDX-License-Identifier: GPL-2.0+
8 #include <common.h> /* core U-Boot definitions */
9 #include <spartan2.h> /* Spartan-II device family */
42 /* ------------------------------------------------------------------------- */
43 /* Spartan-II Generic Implementation */
49 switch (desc->iface) { in spartan2_load()
62 __FUNCTION__, desc->iface); in spartan2_load()
72 switch (desc->iface) { in spartan2_dump()
85 __FUNCTION__, desc->iface); in spartan2_dump()
97 /* ------------------------------------------------------------------------- */
[all …]
H A Dspartan3.c5 * SPDX-License-Identifier: GPL-2.0+
13 #include <common.h> /* core U-Boot definitions */
14 #include <spartan3.h> /* Spartan-II device family */
46 /* ------------------------------------------------------------------------- */
47 /* Spartan-II Generic Implementation */
53 switch (desc->iface) { in spartan3_load()
66 __FUNCTION__, desc->iface); in spartan3_load()
76 switch (desc->iface) { in spartan3_dump()
89 __FUNCTION__, desc->iface); in spartan3_dump()
101 /* ------------------------------------------------------------------------- */
[all …]
/rk3399_rockchip-uboot/arch/m68k/cpu/
H A Du-boot.lds7 * SPDX-License-Identifier: GPL-2.0+
34 /* Read-write section, merged into data segment: */
49 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
50 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
74 .text.init : { *(.text.init) }
75 .data.init : { *(.data.init) }
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/
H A Du-boot-nand.lds2 * Copyright 2009-2012 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
24 /* Read-only sections, merged into text segment: */
38 /* Read-write section, merged into data segment: */
50 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
51 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
74 .text.init : { *(.text.init) }
75 .data.init : { *(.data.init) }
79 .bootpg ADDR(.text) - 0x1000 :
H A Du-boot.lds2 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
30 /* Read-only sections, merged into text segment: */
44 /* Read-write section, merged into data segment: */
56 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
57 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
81 .text.init : { *(.text.init) }
82 .data.init : { *(.data.init) }
87 .bootpg ADDR(.text) - 0x1000 :
93 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/
H A Dlowlevel_init.S3 * perform further init.
5 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm-offsets.h>
21 bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */
26 stp x29, x30, [sp, #-16]!
29 * Call the very early init function. This should do only the
32 * - set up DRAM
33 * - use global_data
34 * - clear BSS
35 * - try to start a console
[all …]
/rk3399_rockchip-uboot/board/cssi/MCR3000/
H A Du-boot.lds2 * Copyright (C) 2010-2017 CS Systemes d'Information
3 * Christophe Leroy <christophe.leroy@c-s.fr>
5 * (C) Copyright 2001-2003
10 * SPDX-License-Identifier: GPL-2.0+
16 /* Read-only sections, merged into text segment: */
23 arch/powerpc/cpu/mpc8xx/built-in.o (.text*)
24 arch/powerpc/lib/built-in.o (.text*)
25 board/cssi/MCR3000/built-in.o (.text*)
26 disk/built-in.o (.text*)
27 drivers/net/built-in.o (.text*)
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-mvebu/serdes/a38x/
H A Dhigh_speed_env_spec.c4 * SPDX-License-Identifier: GPL-2.0
25 * serdes_seq_db - holds all serdes sequences, their size and the
31 #define ENDED_OK "High speed PHY - Ended Successfully\n"
64 /* Selector mapping for A380-A0 and A390-Z1 */
159 /* Rx clk and Tx clk select non-inverted mode */
178 /* Rx clk and Tx clk select non-inverted mode */
186 /* SATA and SGMII - power up seq */
203 /* SATA and SGMII - speed config seq */
220 /* SATA and SGMII - TX config seq */
284 /* Assert Rx Init for SGMII */
[all …]
/rk3399_rockchip-uboot/board/intel/edison/
H A Dedison.c4 * SPDX-License-Identifier: GPL-2.0+
7 #include <dwc3-uboot.h>
10 #include <u-boot/md5.h>
18 #include <asm/u-boot-x86.h>
36 int board_usb_init(int index, enum usb_init_type init) in board_usb_init() argument
38 if (index == 0 && init == USB_INIT_DEVICE) in board_usb_init()
40 return -EINVAL; in board_usb_init()
43 int board_usb_cleanup(int index, enum usb_init_type init) in board_usb_cleanup() argument
45 if (index == 0 && init == USB_INIT_DEVICE) { in board_usb_cleanup()
49 return -EINVAL; in board_usb_cleanup()
[all …]
/rk3399_rockchip-uboot/board/spear/x600/
H A Dfpga.c4 * SPDX-License-Identifier: GPL-2.0+
19 * Only PROG and DONE are connected to GPIOs. INIT is not connected to the
28 * Set the active-low FPGA reset signal.
39 * Set the FPGA's active-low SelectMap program line to the specified level
51 * Test the state of the active-low FPGA INIT line. Return 1 on INIT
58 debug("%s:%d: init (state=%d)\n", __func__, __LINE__, state); in fpga_init_fn()
61 * On x600, the FPGA INIT signal is not connected to the SoC. in fpga_init_fn()
62 * We can't read the INIT status. Let's return the "correct" in fpga_init_fn()
63 * INIT signal state generated via a local state-machine. in fpga_init_fn()
74 * Test the state of the active-high FPGA DONE pin
[all …]
/rk3399_rockchip-uboot/drivers/usb/host/
H A Dehci-armada100.c4 * Written-by: Ajay Bhargav <contact@8051projects.net>
9 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
11 * SPDX-License-Identifier: GPL-2.0+
20 #include <asm/arch/utmi-armada100.h>
23 * EHCI host controller init
25 int ehci_hcd_init(int index, enum usb_init_type init, in ehci_hcd_init() argument
29 return -1; in ehci_hcd_init()
33 + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); in ehci_hcd_init()
35 debug("armada100-ehci: init hccr %x and hcor %x hc_length %d\n", in ehci_hcd_init()
37 (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); in ehci_hcd_init()
/rk3399_rockchip-uboot/arch/arm/mach-uniphier/
H A Dspl_board_init.c2 * Copyright (C) 2015-2016 Socionext Inc.
5 * SPDX-License-Identifier: GPL-2.0+
12 #include "init.h"
13 #include "micro-support-card.h"
14 #include "soc-info.h"
110 if (initdata->bcu_init) in UNIPHIER_DEFINE_SOCDATA_FUNC()
111 initdata->bcu_init(bd); in UNIPHIER_DEFINE_SOCDATA_FUNC()
113 initdata->early_clk_init(); in UNIPHIER_DEFINE_SOCDATA_FUNC()
119 ret = initdata->dpll_init(bd); in UNIPHIER_DEFINE_SOCDATA_FUNC()
121 pr_err("failed to init DPLL\n"); in UNIPHIER_DEFINE_SOCDATA_FUNC()
[all …]
/rk3399_rockchip-uboot/drivers/power/regulator/
H A Dpwm_regulator.c4 * Based on kernel drivers/regulator/pwm-regulator.c
5 * Copyright (C) 2014 - STMicroelectronics Inc.
8 * SPDX-License-Identifier: GPL-2.0+
48 return pwm_set_enable(priv->pwm, priv->pwm_id, enable); in pwm_regulator_enable()
54 int min_uV = priv->min_voltage; in pwm_voltage_to_duty_cycle_percentage()
55 int max_uV = priv->max_voltage; in pwm_voltage_to_duty_cycle_percentage()
56 int diff = max_uV - min_uV; in pwm_voltage_to_duty_cycle_percentage()
58 return ((req_uV * 100) - (min_uV * 100)) / diff; in pwm_voltage_to_duty_cycle_percentage()
65 return priv->volt_uV; in pwm_regulator_get_voltage()
76 ret = pwm_set_invert(priv->pwm, priv->pwm_id, priv->polarity); in pwm_regulator_set_voltage()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-uniphier/dram/
H A Dumc-regs.h4 * Copyright (C) 2011-2014 Panasonic Corporation
6 * SPDX-License-Identifier: GPL-2.0+
51 #define UMC_INITSET_INIT1EN BIT(1) /* init without power-on wait */
52 #define UMC_INITSET_INIT0EN BIT(0) /* init with power-on wait */
54 #define UMC_INITSTAT_INIT1ST BIT(1) /* init without power-on wait */
55 #define UMC_INITSTAT_INIT0ST BIT(0) /* init with power-on wait */
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/
H A Dlowlevel_init.S3 * perform further init.
11 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm-offsets.h>
34 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
56 * Call the very early init function. This should do only the
59 * - set up DRAM
60 * - use global_data
61 * - clear BSS
62 * - try to start a console
65 * this init in the SPL board_init_f() function which is called

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