1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ 4 * Andrew F. Davis <afd@ti.com> 5 */ 6 7 #ifndef PLATFORM_CONFIG_H 8 #define PLATFORM_CONFIG_H 9 10 #include <mm/generic_ram_layout.h> 11 12 #define UART0_BASE 0x02800000 13 14 #define CONSOLE_UART_BASE (UART0_BASE + CFG_CONSOLE_UART * 0x10000) 15 #define CONSOLE_BAUDRATE 115200 16 #define CONSOLE_UART_CLK_IN_HZ 48000000 17 18 #define DRAM0_BASE 0x80000000 19 #define DRAM0_SIZE 0x80000000 20 21 #define DRAM1_BASE 0x880000000 22 #define DRAM1_SIZE 0x780000000 23 24 #define SCU_BASE 0x01800000 25 #if defined(PLATFORM_FLAVOR_j721e) || defined(PLATFORM_FLAVOR_j784s4) 26 #define GICC_OFFSET 0x100000 27 #define GICC_SIZE 0x100000 28 #define GICD_OFFSET 0x0 29 #define GICD_SIZE 0x10000 30 #else 31 #define GICC_OFFSET 0x80000 32 #define GICC_SIZE 0x90000 33 #define GICD_OFFSET 0x0 34 #define GICD_SIZE 0x10000 35 #endif 36 #if defined(PLATFORM_FLAVOR_am65x) || defined(PLATFORM_FLAVOR_j721e) || \ 37 defined(PLATFORM_FLAVOR_j784s4) 38 #define SEC_PROXY_DATA_BASE 0x32c00000 39 #define SEC_PROXY_DATA_SIZE 0x100000 40 #define SEC_PROXY_SCFG_BASE 0x32800000 41 #define SEC_PROXY_SCFG_SIZE 0x100000 42 #define SEC_PROXY_RT_BASE 0x32400000 43 #define SEC_PROXY_RT_SIZE 0x100000 44 #define SEC_PROXY_RESPONSE_THREAD 6 45 #define SEC_PROXY_REQUEST_THREAD 7 46 #else 47 #define SEC_PROXY_DATA_BASE 0x4d000000 48 #define SEC_PROXY_DATA_SIZE 0x80000 49 #define SEC_PROXY_SCFG_BASE 0x4a400000 50 #define SEC_PROXY_SCFG_SIZE 0x80000 51 #define SEC_PROXY_RT_BASE 0x4a600000 52 #define SEC_PROXY_RT_SIZE 0x80000 53 #define SEC_PROXY_RESPONSE_THREAD 10 54 #define SEC_PROXY_REQUEST_THREAD 11 55 #endif 56 #define OPTEE_HOST_ID 11 57 #define SEC_PROXY_TIMEOUT_US 1000000 58 #define GICC_BASE (SCU_BASE + GICC_OFFSET) 59 #define GICD_BASE (SCU_BASE + GICD_OFFSET) 60 61 /* SA2UL */ 62 #if defined(PLATFORM_FLAVOR_am65x) 63 #define SA2UL_BASE 0x04e00000 64 #define SA2UL_TI_SCI_DEV_ID 136 65 #define SA2UL_TI_SCI_FW_ID 2112 66 #define SA2UL_TI_SCI_FW_RGN_ID 0 67 #elif defined(PLATFORM_FLAVOR_j721e) 68 #define SA2UL_BASE 0x40900000 69 #define SA2UL_TI_SCI_DEV_ID 265 70 #define SA2UL_TI_SCI_FW_ID 1196 71 #define SA2UL_TI_SCI_FW_RGN_ID 0 72 #elif defined(PLATFORM_FLAVOR_j784s4) 73 #define SA2UL_BASE 0x40900000 74 #define SA2UL_TI_SCI_DEV_ID -1 75 #define SA2UL_TI_SCI_FW_ID 1196 76 #define SA2UL_TI_SCI_FW_RGN_ID 0 77 #elif defined(PLATFORM_FLAVOR_am64x) 78 #define SA2UL_BASE 0x40900000 79 #define SA2UL_TI_SCI_DEV_ID 133 80 #define SA2UL_TI_SCI_FW_ID 35 81 #define SA2UL_TI_SCI_FW_RGN_ID 0 82 #elif defined(PLATFORM_FLAVOR_am62x) || \ 83 defined(PLATFORM_FLAVOR_am62ax) || \ 84 defined(PLATFORM_FLAVOR_am62px) 85 #define SA2UL_BASE 0x40900000 86 #define SA2UL_TI_SCI_DEV_ID -1 87 #define SA2UL_TI_SCI_FW_ID 66 88 #define SA2UL_TI_SCI_FW_RGN_ID 1 89 #endif 90 #define SA2UL_REG_SIZE 0x1000 91 92 /* RNG */ 93 #if defined(PLATFORM_FLAVOR_am62lx) 94 #define RNG_BASE 0x3B100000 95 #define RNG_REG_SIZE 0x80 96 #elif defined(SA2UL_BASE) 97 #define RNG_BASE (SA2UL_BASE + 0x10000) 98 #define RNG_REG_SIZE 0x1000 99 #elif !defined(CFG_WITH_SOFTWARE_PRNG) 100 /* 101 * If we got here we're trying to build a hardware based RNG driver 102 * but are missing some crticial definitions. This is usually because 103 * we're using the wrong platform flavor. 104 */ 105 #error "Unknown platform flavor! No base address is defined for RNG" 106 #endif 107 108 #if defined(PLATFORM_FLAVOR_am62x) || \ 109 defined(PLATFORM_FLAVOR_am62ax) || \ 110 defined(PLATFORM_FLAVOR_am62px) 111 #define RNG_TI_SCI_FW_RGN_ID 2 112 #else 113 #define RNG_TI_SCI_FW_RGN_ID 3 114 #endif 115 116 /* Make stacks aligned to data cache line length */ 117 #define STACK_ALIGNMENT 64 118 119 #endif /*PLATFORM_CONFIG_H*/ 120