Lines Matching refs:E_INT_IRQ_0x50_START
221 E_INT_IRQ_0x50_START = 0x50, enumerator
222 E_INT_IRQ_CA_I3 = E_INT_IRQ_0x50_START+0, //U3
223 E_INT_IRQ_HDMI_LEVEL = E_INT_IRQ_0x50_START+1, //U3
224 E_INT_IRQ_MIPS_WADR_ERR = E_INT_IRQ_0x50_START+2, //U3
225 E_INT_IRQ_RASP = E_INT_IRQ_0x50_START+3, //U3
226 E_INT_IRQ_CA_SVP = E_INT_IRQ_0x50_START+4, //U3
227 E_INT_IRQ_UART2MCU = E_INT_IRQ_0x50_START+5, //U3
228 E_INT_IRQ_URDMA2MCU = E_INT_IRQ_0x50_START+6, //U3
229 E_INT_IRQ_IIC1 = E_INT_IRQ_0x50_START+7, //U3
230 E_INT_IRQ_HDCP = E_INT_IRQ_0x50_START+8, //U3
231 E_INT_IRQ_DMA_WADR_ERR = E_INT_IRQ_0x50_START+9, //U3
232 E_INT_IRQ_UP_IRQ_UART_CA = E_INT_IRQ_0x50_START+10, //U3
233 E_INT_IRQ_UP_IRQ_EMM_ECM = E_INT_IRQ_0x50_START+11, //U3
234 E_INT_IRQ_ONIF = E_INT_IRQ_0x50_START+12, //T8
235 E_INT_IRQ_USB1 = E_INT_IRQ_0x50_START+13, //T8
236 E_INT_IRQ_UHC1 = E_INT_IRQ_0x50_START+14, //T8
237 E_INT_IRQ_MFE = E_INT_IRQ_0x50_START+15, //T8