Lines Matching refs:OS_BASE_ADDR
105 #define OS_BASE_ADDR 0xa0000000 macro
108 #define OS_BASE_ADDR 0xbf000000 macro
110 #define OS_BASE_ADDR 0xbf800000 macro
113 #define OS_BASE_ADDR 0xfd000000 macro
119 #define UHC_BASE (OS_BASE_ADDR+0x4800)
120 #define UHC2_BASE (OS_BASE_ADDR+0x1600)
121 #define UTMIBaseAddr (OS_BASE_ADDR+0x7500)
122 #define UTMIBaseAddr2 (OS_BASE_ADDR+0x7580)
123 #define USBCBase (OS_BASE_ADDR+0xe00)
124 #define USBCBase2 (OS_BASE_ADDR+0x1800)
128 #define UHC_BASE (OS_BASE_ADDR+0x4800)
129 #define UHC2_BASE (OS_BASE_ADDR+0x1a00)
130 #define UTMIBaseAddr (OS_BASE_ADDR+0x7500)
131 #define UTMIBaseAddr2 (OS_BASE_ADDR+0x7400)
132 #define USBCBase (OS_BASE_ADDR+0xe00)
133 #define USBCBase2 (OS_BASE_ADDR+0xf00)
137 #define UHC_BASE (OS_BASE_ADDR+0x204800)
138 #define UHC2_BASE (OS_BASE_ADDR+0x201a00)
139 #define UTMIBaseAddr (OS_BASE_ADDR+0x207500)
140 #define UTMIBaseAddr2 (OS_BASE_ADDR+0x207400)
141 #define USBCBase (OS_BASE_ADDR+0x200e00)
142 #define USBCBase2 (OS_BASE_ADDR+0x200f00)
146 #define UHC_BASE (OS_BASE_ADDR+0x204800)
147 #define UHC2_BASE (OS_BASE_ADDR+0x201a00)
148 #define UTMIBaseAddr (OS_BASE_ADDR+0x207500)
149 #define UTMIBaseAddr2 (OS_BASE_ADDR+0x207400)
150 #define USBCBase (OS_BASE_ADDR+0x200e00)
151 #define USBCBase2 (OS_BASE_ADDR+0x200f00)
153 #define UHC3_BASE (OS_BASE_ADDR+0x227200)
154 #define UTMIBaseAddr3 (OS_BASE_ADDR+0x207200)
155 #define USBCBase3 (OS_BASE_ADDR+0x227000)
157 #define UHC4_BASE (OS_BASE_ADDR+0x244c00)
158 #define UTMIBaseAddr4 (OS_BASE_ADDR+0x244100)
159 #define USBCBase4 (OS_BASE_ADDR+0x227100)
168 #define UHC_BASE (OS_BASE_ADDR+0x4800)
169 #define UTMIBaseAddr (OS_BASE_ADDR+0x7500)
182 #define UHC_BASE (OS_BASE_ADDR+0x4800)
183 #define UTMIBaseAddr (OS_BASE_ADDR+0x7500)